[PATCH] D41651: AMDGPU: Add 32-bit constant address space

[Marek Olšák via Phabricator via llvm-commits]

mareko updated this revision to Diff 132216.
mareko added a comment.

32-bit loads are always considered uniform and so are always translated
to s_loads with possible v_readfirstlane.

If you don't want uniformity, expand the pointer into a descriptor
manually and use SI.load.const.


Repository:
  rL LLVM

https://reviews.llvm.org/D41651

Files:
  docs/AMDGPUUsage.rst
  lib/Target/AMDGPU/AMDGPU.h
  lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
  lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
  lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  lib/Target/AMDGPU/SIMachineFunctionInfo.h
  lib/Target/AMDGPU/SMInstructions.td
  lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  test/CodeGen/AMDGPU/constant-address-space-32bit.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D41651.132216.patch
Type: text/x-patch
Size: 30630 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180131/aa6f3251/attachment.bin>