[llvm] r323889 - [Hexagon] Handle BUILD_VECTOR from undef values in buildHvxVectorReg

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Wed Jan 31 08:52:15 2018
New Revision: 323889

URL: http://llvm.org/viewvc/llvm-project?rev=323889&view=rev
Log:
[Hexagon] Handle BUILD_VECTOR from undef values in buildHvxVectorReg

Added:
    llvm/trunk/test/CodeGen/Hexagon/autohvx/isel-build-undef.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp?rev=323889&r1=323888&r2=323889&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp Wed Jan 31 08:52:15 2018
@@ -168,16 +168,19 @@ HexagonTargetLowering::buildHvxVectorReg
   }
 
   unsigned NumWords = Words.size();
-  bool IsSplat = true;
+  bool IsSplat = true, IsUndef = true;
   SDValue SplatV;
   for (unsigned i = 0; i != NumWords && IsSplat; ++i) {
     if (isUndef(Words[i]))
       continue;
+    IsUndef = false;
     if (!SplatV.getNode())
       SplatV = Words[i];
     else if (SplatV != Words[i])
       IsSplat = false;
   }
+  if (IsUndef)
+    return DAG.getUNDEF(VecTy);
   if (IsSplat) {
     assert(SplatV.getNode());
     auto *IdxN = dyn_cast<ConstantSDNode>(SplatV.getNode());

Added: llvm/trunk/test/CodeGen/Hexagon/autohvx/isel-build-undef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/autohvx/isel-build-undef.ll?rev=323889&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/autohvx/isel-build-undef.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/autohvx/isel-build-undef.ll Wed Jan 31 08:52:15 2018
@@ -0,0 +1,39 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; During lowering, a BUILD_VECTOR of undef values was created. This was
+; not properly handled by buildHvxVectorReg, which tried to generate a
+; splat, but had no source value.
+;
+; Check that this compiles successfully.
+; CHECK: vxor
+
+target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
+target triple = "hexagon"
+
+define void @fred() #0 {
+b0:
+  %v1 = load i8, i8* undef, align 1
+  %v2 = insertelement <32 x i8> undef, i8 %v1, i32 31
+  %v3 = zext <32 x i8> %v2 to <32 x i16>
+  %v4 = add nuw nsw <32 x i16> %v3, zeroinitializer
+  %v5 = add nuw nsw <32 x i16> %v4, zeroinitializer
+  %v6 = add nuw nsw <32 x i16> %v5, zeroinitializer
+  %v7 = add nuw nsw <32 x i16> %v6, zeroinitializer
+  %v8 = add nuw nsw <32 x i16> %v7, zeroinitializer
+  %v9 = add nuw nsw <32 x i16> %v8, zeroinitializer
+  %v10 = add <32 x i16> %v9, zeroinitializer
+  %v11 = add <32 x i16> %v10, zeroinitializer
+  %v12 = add <32 x i16> %v11, zeroinitializer
+  %v13 = add <32 x i16> %v12, zeroinitializer
+  %v14 = add <32 x i16> %v13, zeroinitializer
+  %v15 = add <32 x i16> %v14, zeroinitializer
+  %v16 = add <32 x i16> %v15, zeroinitializer
+  %v17 = add <32 x i16> %v16, zeroinitializer
+  %v18 = add <32 x i16> %v17, zeroinitializer
+  %v19 = lshr <32 x i16> %v18, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
+  %v20 = trunc <32 x i16> %v19 to <32 x i8>
+  store <32 x i8> %v20, <32 x i8>* undef, align 1
+  unreachable
+}
+
+attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }