[PATCH] D42737: [LegalizeDAG] Support expanding condition operand of ISD::SELECT
Eugene Leviant via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 31 07:07:11 PST 2018
evgeny777 created this revision.
evgeny777 added reviewers: t.p.northover, baldrick, delena, craig.topper, deadalnix.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.
I'm facing a crash when compiling large in-house project for AArch64 using clang, which happens because condition argument of ISD::SELECT can't be expanded (for my case required expansion is `i128 -> i64`). This patch adds required support.
https://reviews.llvm.org/D42737
Files:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
lib/CodeGen/SelectionDAG/LegalizeTypes.h
test/CodeGen/AArch64/expand-select.ll
Index: test/CodeGen/AArch64/expand-select.ll
===================================================================
--- test/CodeGen/AArch64/expand-select.ll
+++ test/CodeGen/AArch64/expand-select.ll
@@ -0,0 +1,13 @@
+; REQUIRES: asserts
+
+; Check that we don't crash
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu -O3 %s -debug-only=selectiondag,legalize-types -o -
+
+define void @foo(i32 %In1, <2 x i128> %In2, <2 x i128> %In3, <2 x i128> *%Out) {
+ %cond = and i32 %In1, 1
+ %cbool = icmp eq i32 %cond, 0
+ %res = select i1 %cbool, <2 x i128> %In2, <2 x i128> %In3
+ store <2 x i128> %res, <2 x i128> *%Out
+
+ ret void
+}
Index: lib/CodeGen/SelectionDAG/LegalizeTypes.h
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -375,6 +375,7 @@
// Integer Operand Expansion.
bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo);
SDValue ExpandIntOp_BR_CC(SDNode *N);
+ SDValue ExpandIntOp_SELECT(SDNode *N);
SDValue ExpandIntOp_SELECT_CC(SDNode *N);
SDValue ExpandIntOp_SETCC(SDNode *N);
SDValue ExpandIntOp_SETCCE(SDNode *N);
Index: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -2902,6 +2902,11 @@
case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
case ISD::INSERT_VECTOR_ELT: Res = ExpandOp_INSERT_VECTOR_ELT(N); break;
case ISD::SCALAR_TO_VECTOR: Res = ExpandOp_SCALAR_TO_VECTOR(N); break;
+ case ISD::SELECT:
+ // We expect only condition argument to be expanded
+ assert(OpNo == 0);
+ Res = ExpandIntOp_SELECT(N);
+ break;
case ISD::SELECT_CC: Res = ExpandIntOp_SELECT_CC(N); break;
case ISD::SETCC: Res = ExpandIntOp_SETCC(N); break;
case ISD::SETCCE: Res = ExpandIntOp_SETCCE(N); break;
@@ -3106,6 +3111,13 @@
N->getOperand(4)), 0);
}
+SDValue DAGTypeLegalizer::ExpandIntOp_SELECT(SDNode *N) {
+ SDValue InL, InH;
+ GetExpandedInteger(N->getOperand(0), InL, InH);
+ return DAG.getNode(ISD::SELECT, SDLoc(N), N->getValueType(0), InL,
+ N->getOperand(1), N->getOperand(2));
+}
+
SDValue DAGTypeLegalizer::ExpandIntOp_SELECT_CC(SDNode *N) {
SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
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