[llvm] r323762 - [X86FixupBWInsts] mir-simplify fixup-bw-inst.mir test. NFC.

Andrei Elovikov via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 30 06:25:12 PST 2018


Author: a.elovikov
Date: Tue Jan 30 06:25:12 2018
New Revision: 323762

URL: http://llvm.org/viewvc/llvm-project?rev=323762&view=rev
Log:
[X86FixupBWInsts] mir-simplify fixup-bw-inst.mir test. NFC.

Modified:
    llvm/trunk/test/CodeGen/X86/fixup-bw-inst.mir

Modified: llvm/trunk/test/CodeGen/X86/fixup-bw-inst.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fixup-bw-inst.mir?rev=323762&r1=323761&r2=323762&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fixup-bw-inst.mir (original)
+++ llvm/trunk/test/CodeGen/X86/fixup-bw-inst.mir Tue Jan 30 06:25:12 2018
@@ -34,24 +34,15 @@
   }
 
   define void @test5() {ret void}
+
 ...
 ---
 # CHECK-LABEL: name: test1
 name:            test1
 alignment:       4
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
 tracksRegLiveness: true
-registers:
 liveins:
   - { reg: '%rax' }
-frameInfo:
-  stackSize:       0
-fixedStack:
-stack:
-constants:
 # Verify that "movw (%rax), %ax" is changed to "movzwl (%rax), %rax".
 #
 # For that to happen, the liveness information after the MOV16rm
@@ -71,19 +62,9 @@ body:             |
 # CHECK-LABEL: name: test2
 name:            test2
 alignment:       4
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
 tracksRegLiveness: true
-registers:
 liveins:
   - { reg: '%rax' }
-frameInfo:
-  stackSize:       0
-fixedStack:
-stack:
-constants:
 # Imp-use of any super-register means the register is live before the MOV
 body:             |
   bb.0:
@@ -102,34 +83,9 @@ body:             |
 # CHECK-LABEL: name: test3
 name:            test3
 alignment:       4
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
 tracksRegLiveness: true
-registers:
 liveins:
-  - { reg: '%rdi', virtual-reg: '' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  stackProtector:  ''
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-  savePoint:       ''
-  restorePoint:    ''
-fixedStack:
-stack:
-constants:
+  - { reg: '%rdi' }
 # After MOV16rm the whole %eax is not *really* live, as can be seen by
 # missing implicit-uses of it in that MOV. Make sure that MOV is
 # transformed into MOVZX.
@@ -161,86 +117,36 @@ body:             |
 # CHECK-LABEL: name: test4
 name:            test4
 alignment:       4
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
 tracksRegLiveness: true
-registers:
 liveins:
   - { reg: '%r9d' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  stackProtector:  ''
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-  savePoint:       ''
-  restorePoint:    ''
-fixedStack:
-stack:
-constants:
 # This code copies r10b into r9b and then uses r9w. We would like to promote
 # the copy to a 32-bit copy, but because r9w is used this is not acceptable.
 body:             |
   bb.0.entry:
-    successors:
     liveins: %r9d
 
     %r9b = MOV8rr undef %r10b, implicit-def %r9d, implicit killed %r9d, implicit-def %eflags
     ; CHECK: %r9b = MOV8rr undef %r10b, implicit-def %r9d, implicit killed %r9d, implicit-def %eflags
+
     %ax = OR16rr undef %ax, %r9w, implicit-def %eflags
     RETQ %ax
-...
 
+...
 ---
 # CHECK-LABEL: name: test5
 name:            test5
 alignment:       4
-exposesReturnsTwice: false
-legalized:       false
-regBankSelected: false
-selected:        false
 tracksRegLiveness: true
-registers:
 liveins:
   - { reg: '%ch', reg: '%bl' }
-frameInfo:
-  isFrameAddressTaken: false
-  isReturnAddressTaken: false
-  hasStackMap:     false
-  hasPatchPoint:   false
-  stackSize:       0
-  offsetAdjustment: 0
-  maxAlignment:    0
-  adjustsStack:    false
-  hasCalls:        false
-  stackProtector:  ''
-  maxCallFrameSize: 0
-  hasOpaqueSPAdjustment: false
-  hasVAStart:      false
-  hasMustTailInVarArgFunc: false
-  savePoint:       ''
-  restorePoint:    ''
-fixedStack:
-stack:
-constants:
 body:             |
   bb.0:
-    successors:
     liveins: %ch, %bl
 
     %cl = MOV8rr %bl, implicit-def %cx, implicit killed %ch, implicit-def %eflags
     ; CHECK: %cl = MOV8rr %bl, implicit-def %cx, implicit killed %ch, implicit-def %eflags
 
     RETQ %cx
+
 ...




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