[PATCH] D42449: [MachineVerifier] Add check that renamable operands aren't reserved registers.

Geoff Berry via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 29 10:58:47 PST 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL323676: [MachineVerifier] Add check that renamable operands aren't reserved registers. (authored by gberry, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D42449?vs=131812&id=131829#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D42449

Files:
  llvm/trunk/lib/CodeGen/MachineVerifier.cpp


Index: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp
@@ -1101,12 +1101,14 @@
           }
         }
       }
-      if (MO->isRenamable() &&
-          ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
-           (MO->isUse() && MI->hasExtraSrcRegAllocReq()))) {
-        report("Illegal isRenamable setting for opcode with extra regalloc "
-               "requirements",
-               MO, MONum);
+      if (MO->isRenamable()) {
+        if ((MO->isDef() && MI->hasExtraDefRegAllocReq()) ||
+            (MO->isUse() && MI->hasExtraSrcRegAllocReq()))
+          report("Illegal isRenamable setting for opcode with extra regalloc "
+                 "requirements",
+                 MO, MONum);
+        if (MRI->isReserved(Reg))
+          report("isRenamable set on reserved register", MO, MONum);
         return;
       }
     } else {


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