[PATCH] D42580: [ARM] Armv8.2-A FP16 code generation (part 2/3)

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer created this revision.
SjoerdMeijer added reviewers: samparker, olista01, eli.friedman, t.p.northover.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

Half-precision arguments and return values are passed as if it 
were an int or float for ARM. This results in truncates and
bitcasts to/from i16 and f16 values, which are legalized very 
early to stack stores/loads. When FullFP16 is enabled, we want
to avoid codegen for these bitcasts as it is unnecessary and
inefficient.


https://reviews.llvm.org/D42580

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMInstrVFP.td
  test/CodeGen/ARM/fp16-instructions.ll

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