[PATCH] D42235: [AArch64] Avoid unnecessary vector byte-swapping in big-endian
Matthias Braun via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 25 17:27:58 PST 2018
MatzeB added reviewers: evandro, t.p.northover.
MatzeB added a comment.
This apparently defeats the logic in `splitStores()` (aka the infamous FeatureMisalignedSlow128Bit) because that code had an exception for v2i64 vector types but wants to split all other vector types. An internal test case of ours:
define void @test_split_16B(<4 x float> %val, <4 x float>* %addr) {
store <4 x float> %val, <4 x float>* %addr, align 8
ret void
}
would no longer show the store getting split.
Independently of this I disabled `FeatureMisalignedSlow128` for apple a few hours later so my interest is limited now :)
But I think Exynos is still using the "feature", so they may want to look into this.
Repository:
rL LLVM
https://reviews.llvm.org/D42235
More information about the llvm-commits
mailing list