[llvm] r323474 - [AArch64] Enable aggressive FMA on T99 and provide AArch64 options for others.
Joel Jones via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 25 13:55:39 PST 2018
Author: joel_k_jones
Date: Thu Jan 25 13:55:39 2018
New Revision: 323474
URL: http://llvm.org/viewvc/llvm-project?rev=323474&view=rev
Log:
[AArch64] Enable aggressive FMA on T99 and provide AArch64 options for others.
This patch enables aggressive FMA by default on T99, and provides a -mllvm
option to enable the same on other AArch64 micro-arch's (-mllvm
-aarch64-enable-aggressive-fma).
Test case demonstrating the effects on T99 is included.
Patch by: steleman (Stefan Teleman)
Differential Revision: https://reviews.llvm.org/D40696
Modified:
llvm/trunk/lib/Target/AArch64/AArch64.td
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=323474&r1=323473&r2=323474&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Thu Jan 25 13:55:39 2018
@@ -149,6 +149,12 @@ def FeatureLSLFast : SubtargetFeature<
"lsl-fast", "HasLSLFast", "true",
"CPU has a fastpath logical shift of up to 3 places">;
+def FeatureAggressiveFMA :
+ SubtargetFeature<"aggressive-fma",
+ "HasAggressiveFMA",
+ "true",
+ "Enable Aggressive FMA for floating-point.">;
+
//===----------------------------------------------------------------------===//
// Architectures.
//
@@ -390,6 +396,7 @@ def ProcSaphira : SubtargetFeature<"sap
def ProcThunderX2T99 : SubtargetFeature<"thunderx2t99", "ARMProcFamily",
"ThunderX2T99",
"Cavium ThunderX2 processors", [
+ FeatureAggressiveFMA,
FeatureCRC,
FeatureCrypto,
FeatureFPARMv8,
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=323474&r1=323473&r2=323474&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Thu Jan 25 13:55:39 2018
@@ -10982,6 +10982,10 @@ bool AArch64TargetLowering::isIntDivChea
return OptSize && !VT.isVector();
}
+bool AArch64TargetLowering::enableAggressiveFMAFusion(EVT VT) const {
+ return Subtarget->hasAggressiveFMA() && VT.isFloatingPoint();
+}
+
unsigned
AArch64TargetLowering::getVaListSizeInBits(const DataLayout &DL) const {
if (Subtarget->isTargetDarwin() || Subtarget->isTargetWindows())
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h?rev=323474&r1=323473&r2=323474&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.h Thu Jan 25 13:55:39 2018
@@ -456,6 +456,9 @@ public:
return true;
}
+ /// Enable aggressive FMA fusion on targets that want it.
+ bool enableAggressiveFMAFusion(EVT VT) const override;
+
/// Returns the size of the platform's va_list object.
unsigned getVaListSizeInBits(const DataLayout &DL) const override;
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h?rev=323474&r1=323473&r2=323474&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h Thu Jan 25 13:55:39 2018
@@ -80,6 +80,7 @@ protected:
bool HasLSLFast = false;
bool HasSVE = false;
bool HasRCPC = false;
+ bool HasAggressiveFMA = false;
// HasZeroCycleRegMove - Has zero-cycle register mov instructions.
bool HasZeroCycleRegMove = false;
@@ -269,6 +270,7 @@ public:
bool hasLSLFast() const { return HasLSLFast; }
bool hasSVE() const { return HasSVE; }
bool hasRCPC() const { return HasRCPC; }
+ bool hasAggressiveFMA() const { return HasAggressiveFMA; }
bool isLittleEndian() const { return IsLittle; }
More information about the llvm-commits
mailing list