[PATCH] D42509: [LivePhysRegs] Preserve pristine registers in blocks with no successors.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 24 15:35:59 PST 2018
efriedma updated this revision to Diff 131369.
efriedma added a comment.
Fix testcase so both functions use the same codepath.
Repository:
rL LLVM
https://reviews.llvm.org/D42509
Files:
lib/CodeGen/LivePhysRegs.cpp
test/CodeGen/Thumb/stm-scavenging.ll
Index: test/CodeGen/Thumb/stm-scavenging.ll
===================================================================
--- /dev/null
+++ test/CodeGen/Thumb/stm-scavenging.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s | FileCheck %s
+target triple = "thumbv6---gnueabi"
+
+; Use STM to save the three registers
+; CHECK-LABEL: use_stm:
+; CHECK: .save {r7, lr}
+; CHECK: .setfp r7, sp
+; CHECK: stm r3!, {r0, r1, r2}
+; CHECK: bl throws_1
+define void @use_stm(i32 %a, i32 %b, i32 %c, i32* %d) local_unnamed_addr noreturn "no-frame-pointer-elim"="true" {
+entry:
+ %arrayidx = getelementptr inbounds i32, i32* %d, i32 2
+ store i32 %a, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32, i32* %d, i32 3
+ store i32 %b, i32* %arrayidx1, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %d, i32 4
+ store i32 %c, i32* %arrayidx2, align 4
+ tail call void @throws_1(i32 %a, i32 %b, i32 %c) noreturn
+ unreachable
+}
+
+; Don't use STM: there is no available register to store
+; the address. We could transform this with some extra math, but
+; that currently isn't implemented.
+; CHECK-LABEL: no_stm:
+; CHECK: .save {r7, lr}
+; CHECK: .setfp r7, sp
+; CHECK: str r0,
+; CHECK: str r1,
+; CHECK: str r2,
+; CHECK: bl throws_2
+define void @no_stm(i32 %a, i32 %b, i32 %c, i32* %d) local_unnamed_addr noreturn "no-frame-pointer-elim"="true" {
+entry:
+ %arrayidx = getelementptr inbounds i32, i32* %d, i32 2
+ store i32 %a, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32, i32* %d, i32 3
+ store i32 %b, i32* %arrayidx1, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %d, i32 4
+ store i32 %c, i32* %arrayidx2, align 4
+ tail call void @throws_2(i32 %a, i32 %b, i32 %c, i32* %d) noreturn
+ unreachable
+}
+
+
+declare void @throws_1(i32, i32, i32) noreturn
+declare void @throws_2(i32, i32, i32, i32*) noreturn
+
Index: lib/CodeGen/LivePhysRegs.cpp
===================================================================
--- lib/CodeGen/LivePhysRegs.cpp
+++ lib/CodeGen/LivePhysRegs.cpp
@@ -225,10 +225,10 @@
void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) {
const MachineFunction &MF = *MBB.getParent();
- if (!MBB.succ_empty()) {
+ if (!MBB.isReturnBlock()) {
addPristines(MF);
addLiveOutsNoPristines(MBB);
- } else if (MBB.isReturnBlock()) {
+ } else {
// For the return block: Add all callee saved registers.
const MachineFrameInfo &MFI = MF.getFrameInfo();
if (MFI.isCalleeSavedInfoValid())
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