[llvm] r323303 - [X86] Remove redundant regular expression from the Znver1 scheduler model. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 23 21:14:34 PST 2018


Author: ctopper
Date: Tue Jan 23 21:14:33 2018
New Revision: 323303

URL: http://llvm.org/viewvc/llvm-project?rev=323303&view=rev
Log:
[X86] Remove redundant regular expression from the Znver1 scheduler model. NFC

Modified:
    llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td

Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=323303&r1=323302&r2=323303&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Tue Jan 23 21:14:33 2018
@@ -1383,7 +1383,6 @@ def : InstRW<[ZnWriteCVTPD2DQLd], (instr
 def : InstRW<[ZnWriteCVTPD2DQr], (instregex "VCVT(T?)PD2DQYrr")>;
 // x,m256.
 def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQYrm")>;
-def : InstRW<[ZnWriteCVTPD2DQLd], (instregex "VCVT(T?)PD2DQ(64)?rm")>;
 
 def ZnWriteCVTPS2PIr: SchedWriteRes<[ZnFPU3]> {
   let Latency = 4;




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