[PATCH] D42402: [GISel]: Eliminate redundant copies b/w VRegs of same regclass at the end of InstructionSelection
Aditya Nandakumar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 23 15:49:54 PST 2018
aditya_nandakumar updated this revision to Diff 131164.
aditya_nandakumar marked 4 inline comments as done.
aditya_nandakumar added a comment.
Updated based on Justin's feedback.
@qcolombet , I'm not sure if it always makes sense to propagate the register class information for all copies and replacing before the select hook for COPY. For all you know the target may want to do something special with the COPY.
https://reviews.llvm.org/D42402
Files:
lib/CodeGen/GlobalISel/InstructionSelect.cpp
test/CodeGen/AArch64/GlobalISel/select-bitcast-bigendian.mir
test/CodeGen/AArch64/GlobalISel/select-bitcast.mir
test/CodeGen/AArch64/GlobalISel/select-br.mir
test/CodeGen/AArch64/GlobalISel/select-int-ext.mir
test/CodeGen/AArch64/GlobalISel/select-int-ptr-casts.mir
test/CodeGen/AArch64/GlobalISel/select-store.mir
test/CodeGen/AArch64/GlobalISel/select-trunc.mir
test/CodeGen/AArch64/GlobalISel/select.mir
test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir
test/CodeGen/X86/GlobalISel/select-ext.mir
test/CodeGen/X86/GlobalISel/select-merge-vec256.mir
test/CodeGen/X86/GlobalISel/select-merge-vec512.mir
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