[PATCH] D42402: [GISel]: Eliminate redundant copies b/w VRegs of same regclass at the end of InstructionSelection
Quentin Colombet via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 23 14:02:22 PST 2018
qcolombet added a comment.
Sounds like a good thing to do.
One comment inline.
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Comment at: lib/CodeGen/GlobalISel/InstructionSelect.cpp:194
+ }
+ }
+
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Instead of having another pass through the IR for this, could we do it while we do the ISel loop?
Meaning, if the register banks match, push the RC to the def and let constraint operand create a new copy if need be.
I would expect this to be more efficient in term of compile time, but we would need to check.
https://reviews.llvm.org/D42402
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