[PATCH] D42377: [CodeGen] Use MIR syntax for MachineMemOperand printing

[Francis Visoiu Mistrih via Phabricator via llvm-commits]

thegameg added inline comments.


================
Comment at: lib/CodeGen/MachineOperand.cpp:992
-  // pointer.
-  if (getBaseAlignment() != getAlignment())
-    OS << "(align=" << getBaseAlignment() << ")";
----------------
thegameg wrote:
> I just noticed this was printed before and won't be printed anymore after this patch.
> 
> IIUC, here we print the alignment of the base if it is affected by the offset, while in MIR and in this file at the line 999 we only care about the base alignment and only print the alignment of the whole reference.
> 
> Please correct me if I'm wrong.
The only test in this case is `CodeGen/AMDGPU/extload-align.ll`.

The original is:

```
BUFFER_STORE_SHORT_OFFEN %13, %stack.0, %sgpr96_sgpr97_sgpr98_sgpr99, %sgpr3, 2, 0, 0, 0, implicit %exec; mem:ST2[FixedStack0(addrspace=5)(align=8)+2](align=2)
```

after this patch:

```
BUFFER_STORE_SHORT_OFFEN %13, %stack.0, %sgpr96_sgpr97_sgpr98_sgpr99, %sgpr3, 2, 0, 0, 0, implicit %exec :: (store 2 into %stack.0 + 2, align 8, addrspace 5)
```

The MIR parser expects that alignment to be the base alignment, while when reading it it looks like this is the alignment of the whole reference.


https://reviews.llvm.org/D42377