[PATCH] D42196: [compiler-rt] [builtins] Align addresses to cache lines in __clear_cache for aarch64

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo added a comment.

In https://reviews.llvm.org/D42196#984791, @peter.smith wrote:

> I guess this comes down to the interpretation of (begin, end] when you can only clear a cache line at a time. I think that this makes sense as it matches the __powerpc64__ below, Linux also follows this approach. I'm not sure how this is done on BSD and Darwin.


It also matches libgcc: https://github.com/gcc-mirror/gcc/blob/master/libgcc/config/aarch64/sync-cache.c

I'm not sure at what granularity memory protection can be set (if it can be more granular than the cache line size) - in that case, we shouldn't align the start but instead align after each (= the first) increment instead. But seeing as nobody else does that, including libgcc that operates in user mode, I think this should be fine.


Repository:
  rCRT Compiler Runtime

https://reviews.llvm.org/D42196