[PATCH] D42124: SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64

Mark Searles via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 22 12:34:24 PST 2018


msearles marked 3 inline comments as done.
msearles added inline comments.


================
Comment at: lib/Target/AMDGPU/SILoadStoreOptimizer.cpp:501
+    unsigned CarryReg = MRI->createVirtualRegister(&AMDGPU::SReg_64RegClass);
+    BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::V_MOV_B32_e32), ImmReg)
+      .addImm(CI.BaseOff);
----------------
rampitec wrote:
> Use COPY, not MOV.
COPY doesn't allow an immediate; changed it to a scalar mov


https://reviews.llvm.org/D42124





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