[PATCH] D42358: [X86][x32] Save callee-save register used as base pointer for x32 ABI

[Pratik Bhatu via Phabricator via llvm-commits]

pbhatu created this revision.
pbhatu added reviewers: craig.topper, pavel.v.chupin, dschuff.
Herald added a subscriber: llvm-commits.

For the x32 ABI, since the base pointer register (EBX) is a callee save register
it should be saved before use.

This fixes https://bugs.llvm.org/show_bug.cgi?id=36011


Repository:
  rL LLVM

https://reviews.llvm.org/D42358

Files:
  lib/Target/X86/X86FrameLowering.cpp
  test/CodeGen/X86/x86-64-baseptr.ll


Index: test/CodeGen/X86/x86-64-baseptr.ll
===================================================================
--- test/CodeGen/X86/x86-64-baseptr.ll
+++ test/CodeGen/X86/x86-64-baseptr.ll
@@ -39,6 +39,7 @@
 ; X32ABI:       # %bb.0: # %entry
 ; X32ABI-NEXT:    pushq %rbp
 ; X32ABI-NEXT:    movl %esp, %ebp
+; X32ABI-NEXT:    pushq  %rbx
 ; X32ABI-NEXT:    andl $-32, %esp
 ; X32ABI-NEXT:    subl $32, %esp
 ; X32ABI-NEXT:    movl %esp, %ebx
Index: lib/Target/X86/X86FrameLowering.cpp
===================================================================
--- lib/Target/X86/X86FrameLowering.cpp
+++ lib/Target/X86/X86FrameLowering.cpp
@@ -2087,8 +2087,12 @@
   TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
 
   // Spill the BasePtr if it's used.
-  if (TRI->hasBasePointer(MF))
-    SavedRegs.set(TRI->getBaseRegister());
+  if (TRI->hasBasePointer(MF)){
+    unsigned BasePtr = TRI->getBaseRegister();
+    if (STI.isTarget64BitILP32())
+      BasePtr = getX86SubSuperRegister(BasePtr, 64);
+    SavedRegs.set(BasePtr);
+  }
 }
 
 static bool


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