[PATCH] D42308: [X86][SSE] Don't colaesce v4i32 extracts (RFC)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 19 10:36:32 PST 2018
RKSimon created this revision.
RKSimon added reviewers: craig.topper, efriedma, niravd, andreadb, spatel.
We currently coalesce v4i32 extracts from all 4 elements to 2 v2i64 extracts + shifts/sign-extends.
This seems to have been added back in the days when we tended to spill vectors and reload scalars, or ended up with repeated shuffles moving everything down to 0'th index. I don't think either of these are likely these days as we have better EXTRACT_VECTOR_ELT and VECTOR_SHUFFLE handling, and the existing code tends to make it very difficult for various vector and load combines.
This patch proposes to drop the extract coalescing code - in the test coverage we have this is a net gain, now we could be vector biased but I don't think this is a big problem.
Repository:
rL LLVM
https://reviews.llvm.org/D42308
Files:
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/gather-addresses.ll
test/CodeGen/X86/mulvi32.ll
test/CodeGen/X86/pr18344.ll
test/CodeGen/X86/pr21792.ll
test/CodeGen/X86/var-permute-128.ll
test/CodeGen/X86/var-permute-256.ll
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