[PATCH] D41895: [X86] Another attempt at support prefer-vector-width function attribute

[Eric Christopher via Phabricator via llvm-commits]

echristo accepted this revision.
echristo added a comment.
This revision is now accepted and ready to land.

In general some of the code generation is a bit confusing and not directly extensible to, say "prefer 128 bits", or even feels a bit awkward around what ISA to use rather than what vector length to do our computation in.

That said, making you fix all fo that before would be ridiculous :)

LGTM with the resolution of a couple of the inline comments. I don't feel strongly about them, but would be good to have something.

-eric



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Comment at: lib/Target/X86/X86ISelLowering.cpp:16576-16578
+    // If we don't have VLX and we're trying to avoid 512-bit vectors we
+    // need special handling. Without VLX we have no choice but to use 512-bit
+    // vectors.
----------------
This comment could probably use some clarification: i.e. we're going to want to use blah blah blah.

Also how is this going to work for a preferred 128 bit vector?


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Comment at: lib/Target/X86/X86TargetMachine.cpp:263
+  unsigned PreferVectorWidthOverride = 0;
+  if (F.hasFnAttribute("prefer-vector-width")) {
+    StringRef Val = F.getFnAttribute("prefer-vector-width").getValueAsString();
----------------
Bikeshed: "preferred-vector-width"?


https://reviews.llvm.org/D41895