[PATCH] D42197: [compiler-rt] [builtins] Use FlushInstructionCache on windows on aarch64 as well

Martin Storsjö via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 17 13:03:41 PST 2018


mstorsjo created this revision.
mstorsjo added reviewers: compnerd, t.p.northover.
Herald added subscribers: Sanitizers, kristof.beyls, dberris, rengolin, aemerson.

Generalize this handling to a separate toplevel ifdef (since any windows case should use the same function), instead of indenting
the aarch64 case one step further.


Repository:
  rCRT Compiler Runtime

https://reviews.llvm.org/D42197

Files:
  lib/builtins/clear_cache.c


Index: lib/builtins/clear_cache.c
===================================================================
--- lib/builtins/clear_cache.c
+++ lib/builtins/clear_cache.c
@@ -96,6 +96,8 @@
  * Intel processors have a unified instruction and data cache
  * so there is nothing to do
  */
+#elif defined(_WIN32) && (defined(__arm__) || defined(__aarch64__))
+    FlushInstructionCache(GetCurrentProcess(), start, end - start);
 #elif defined(__arm__) && !defined(__APPLE__)
     #if defined(__FreeBSD__) || defined(__NetBSD__)
         struct arm_sync_icache_args arg;
@@ -123,8 +125,6 @@
                           : "r"(syscall_nr), "r"(start_reg), "r"(end_reg),
                             "r"(flags));
          assert(start_reg == 0 && "Cache flush syscall failed.");
-    #elif defined(_WIN32)
-        FlushInstructionCache(GetCurrentProcess(), start, end - start);
     #else
         compilerrt_abort();
     #endif


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