[llvm] r322848 - [CodeGen][NFC] Refactor MachineInstr::print
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 18 06:52:14 PST 2018
Author: thegameg
Date: Thu Jan 18 06:52:14 2018
New Revision: 322848
URL: http://llvm.org/viewvc/llvm-project?rev=322848&view=rev
Log:
[CodeGen][NFC] Refactor MachineInstr::print
* Handle more cases where the MI is not attached yet
* Add similar asserts like in MIRPrinter::print
Modified:
llvm/trunk/lib/CodeGen/MachineInstr.cpp
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=322848&r1=322847&r2=322848&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Jan 18 06:52:14 2018
@@ -74,6 +74,29 @@
using namespace llvm;
+static const MachineFunction *getMFIfAvailable(const MachineInstr &MI) {
+ if (const MachineBasicBlock *MBB = MI.getParent())
+ if (const MachineFunction *MF = MBB->getParent())
+ return MF;
+ return nullptr;
+}
+
+// Try to crawl up to the machine function and get TRI and IntrinsicInfo from
+// it.
+static void tryToGetTargetInfo(const MachineInstr &MI,
+ const TargetRegisterInfo *&TRI,
+ const MachineRegisterInfo *&MRI,
+ const TargetIntrinsicInfo *&IntrinsicInfo,
+ const TargetInstrInfo *&TII) {
+
+ if (const MachineFunction *MF = getMFIfAvailable(MI)) {
+ TRI = MF->getSubtarget().getRegisterInfo();
+ MRI = &MF->getRegInfo();
+ IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
+ TII = MF->getSubtarget().getInstrInfo();
+ }
+}
+
void MachineInstr::addImplicitDefUseOperands(MachineFunction &MF) {
if (MCID->ImplicitDefs)
for (const MCPhysReg *ImpDefs = MCID->getImplicitDefs(); *ImpDefs;
@@ -1209,11 +1232,15 @@ LLVM_DUMP_METHOD void MachineInstr::dump
void MachineInstr::print(raw_ostream &OS, bool SkipOpers, bool SkipDebugLoc,
const TargetInstrInfo *TII) const {
const Module *M = nullptr;
- if (const MachineBasicBlock *MBB = getParent())
- if (const MachineFunction *MF = MBB->getParent())
- M = MF->getFunction().getParent();
+ const Function *F = nullptr;
+ if (const MachineFunction *MF = getMFIfAvailable(*this)) {
+ F = &MF->getFunction();
+ M = F->getParent();
+ }
ModuleSlotTracker MST(M);
+ if (F)
+ MST.incorporateFunction(*F);
print(OS, MST, SkipOpers, SkipDebugLoc, TII);
}
@@ -1225,18 +1252,10 @@ void MachineInstr::print(raw_ostream &OS
const TargetRegisterInfo *TRI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
+ tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII);
- if (const MachineBasicBlock *MBB = getParent()) {
- MF = MBB->getParent();
- if (MF) {
- MRI = &MF->getRegInfo();
- TRI = MF->getSubtarget().getRegisterInfo();
- if (!TII)
- TII = MF->getSubtarget().getInstrInfo();
- IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
- }
- }
-
+ if (isCFIInstruction())
+ assert(getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
SmallBitVector PrintedTypes(8);
bool ShouldPrintRegisterTies = hasComplexRegisterTies();
@@ -1248,18 +1267,23 @@ void MachineInstr::print(raw_ostream &OS
return findTiedOperandIdx(OpIdx);
return 0U;
};
+ unsigned StartOp = 0;
+ unsigned e = getNumOperands();
+
// Print explicitly defined operands on the left of an assignment syntax.
- unsigned StartOp = 0, e = getNumOperands();
- for (; StartOp < e && getOperand(StartOp).isReg() &&
- getOperand(StartOp).isDef() && !getOperand(StartOp).isImplicit();
- ++StartOp) {
+ while (StartOp < e) {
+ const MachineOperand &MO = getOperand(StartOp);
+ if (!MO.isReg() || !MO.isDef() || MO.isImplicit())
+ break;
+
if (StartOp != 0)
OS << ", ";
+
LLT TypeToPrint = MRI ? getTypeToPrint(StartOp, PrintedTypes, *MRI) : LLT{};
unsigned TiedOperandIdx = getTiedOperandIdx(StartOp);
- getOperand(StartOp).print(OS, MST, TypeToPrint, /*PrintDef=*/false,
- ShouldPrintRegisterTies, TiedOperandIdx, TRI,
- IntrinsicInfo);
+ MO.print(OS, MST, TypeToPrint, /*PrintDef=*/false, ShouldPrintRegisterTies,
+ TiedOperandIdx, TRI, IntrinsicInfo);
+ ++StartOp;
}
if (StartOp != 0)
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