[llvm] r322773 - Add a TargetOption to enable/disable GlobalISel
Volkan Keles via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 17:14:34 PST 2018
r322800 should fix the failure.
Volkan
> On Jan 17, 2018, at 5:07 PM, Volkan Keles via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
> Hi Rafael,
>
> I’m working on that, I’ll push a fix shortly.
>
> Thank you,
> Volkan
>
>> On Jan 17, 2018, at 4:49 PM, Rafael Avila de Espindola <rafael.espindola at gmail.com> wrote:
>>
>> With this I am getting a test failure on linux:
>>
>> ******************** TEST 'LLVM :: CodeGen/AArch64/br-cond-not-merge.ll' FAILED ********************
>> Script:
>> --
>> /home/admin/llvm/build/bin/llc -mtriple=aarch64 -verify-machineinstrs < /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll | /home/admin/llvm/build/bin/FileCheck --check-prefix=CHECK --check-prefix=OPT /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll
>> /home/admin/llvm/build/bin/llc -mtriple=aarch64 -verify-machineinstrs -O0 -fast-isel=0 -global-isel=false < /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll | /home/admin/llvm/build/bin/FileCheck --check-prefix=CHECK --check-prefix=NOOPT /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll
>> --
>> Exit Code: 1
>>
>> Command Output (stderr):
>> --
>> /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll:9:10: error: expected string not found in input
>> ; CHECK: cbz w0, [[L:\.LBB[0-9_]+]]
>> ^
>> <stdin>:6:15: note: scanning from here
>> test_and_not: // @test_and_not
>> ^
>> <stdin>:25:7: note: possible intended match here
>> tbnz w8, #0, .LBB0_1
>> ^
>> /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll:36:10: error: expected string not found in input
>> ; CHECK: cbz w0, [[L:\.LBB[0-9_]+]]
>> ^
>> <stdin>:41:16: note: scanning from here
>> test_and_not2: // @test_and_not2
>> ^
>> <stdin>:60:7: note: possible intended match here
>> tbnz w8, #0, .LBB1_1
>> ^
>> /home/admin/llvm/llvm-project/llvm/test/CodeGen/AArch64/br-cond-not-merge.ll:67:10: error: expected string not found in input
>> ; NOOPT: subs w{{[0-9]+}}, w{{[0-9]+}}, #0
>> ^
>> <stdin>:76:23: note: scanning from here
>> test_cmp_other_block: // @test_cmp_other_block
>> ^
>> <stdin>:92:2: note: possible intended match here
>> eor w8, w9, w8
>> ^
>>
>> --
>>
>> Cheers,
>> Rafael
>>
>> Volkan Keles via llvm-commits <llvm-commits at lists.llvm.org> writes:
>>
>>> Author: volkan
>>> Date: Wed Jan 17 14:34:21 2018
>>> New Revision: 322773
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=322773&view=rev
>>> Log:
>>> Add a TargetOption to enable/disable GlobalISel
>>>
>>> Summary:
>>> This patch adds a new target option in order to control GlobalISel.
>>> This will allow the users to enable/disable GlobalISel prior to the
>>> backend by calling `TargetMachine::setGlobalISel(bool Enable)`.
>>>
>>> No test case as there is already a test to check GlobalISel
>>> command line options.
>>> See: CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll.
>>>
>>> Reviewers: qcolombet, aemerson, ab, dsanders
>>>
>>> Reviewed By: qcolombet
>>>
>>> Subscribers: rovka, javed.absar, kristof.beyls, llvm-commits
>>>
>>> Differential Revision: https://reviews.llvm.org/D42137
>>>
>>> Modified:
>>> llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
>>> llvm/trunk/include/llvm/Target/TargetMachine.h
>>> llvm/trunk/include/llvm/Target/TargetOptions.h
>>> llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
>>> llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
>>>
>>> Modified: llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h?rev=322773&r1=322772&r2=322773&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h (original)
>>> +++ llvm/trunk/include/llvm/CodeGen/TargetPassConfig.h Wed Jan 17 14:34:21 2018
>>> @@ -317,10 +317,6 @@ public:
>>> /// verification is enabled.
>>> void addVerifyPass(const std::string &Banner);
>>>
>>> - /// Check whether or not GlobalISel should be enabled by default.
>>> - /// Fallback/abort behavior is controlled via other methods.
>>> - virtual bool isGlobalISelEnabled() const;
>>> -
>>> /// Check whether or not GlobalISel should abort on error.
>>> /// When this is disabled, GlobalISel will fall back on SDISel instead of
>>> /// erroring out.
>>>
>>> Modified: llvm/trunk/include/llvm/Target/TargetMachine.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=322773&r1=322772&r2=322773&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/Target/TargetMachine.h (original)
>>> +++ llvm/trunk/include/llvm/Target/TargetMachine.h Wed Jan 17 14:34:21 2018
>>> @@ -184,6 +184,7 @@ public:
>>> void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
>>> bool getO0WantsFastISel() { return O0WantsFastISel; }
>>> void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
>>> + void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; }
>>>
>>> bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
>>>
>>>
>>> Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=322773&r1=322772&r2=322773&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
>>> +++ llvm/trunk/include/llvm/Target/TargetOptions.h Wed Jan 17 14:34:21 2018
>>> @@ -104,7 +104,7 @@ namespace llvm {
>>> NoSignedZerosFPMath(false),
>>> HonorSignDependentRoundingFPMathOption(false), NoZerosInBSS(false),
>>> GuaranteedTailCallOpt(false), StackSymbolOrdering(true),
>>> - EnableFastISel(false), UseInitArray(false),
>>> + EnableFastISel(false), EnableGlobalISel(false), UseInitArray(false),
>>> DisableIntegratedAS(false), RelaxELFRelocations(false),
>>> FunctionSections(false), DataSections(false),
>>> UniqueSectionNames(true), TrapUnreachable(false), EmulatedTLS(false),
>>> @@ -186,6 +186,9 @@ namespace llvm {
>>> /// compile time.
>>> unsigned EnableFastISel : 1;
>>>
>>> + /// EnableGlobalISel - This flag enables global instruction selection.
>>> + unsigned EnableGlobalISel : 1;
>>> +
>>> /// UseInitArray - Use .init_array instead of .ctors for static
>>> /// constructors.
>>> unsigned UseInitArray : 1;
>>>
>>> Modified: llvm/trunk/lib/CodeGen/TargetPassConfig.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetPassConfig.cpp?rev=322773&r1=322772&r2=322773&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/CodeGen/TargetPassConfig.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/TargetPassConfig.cpp Wed Jan 17 14:34:21 2018
>>> @@ -123,9 +123,9 @@ static cl::opt<cl::boolOrDefault>
>>> EnableFastISelOption("fast-isel", cl::Hidden,
>>> cl::desc("Enable the \"fast\" instruction selector"));
>>>
>>> -static cl::opt<cl::boolOrDefault>
>>> - EnableGlobalISel("global-isel", cl::Hidden,
>>> - cl::desc("Enable the \"global\" instruction selector"));
>>> +static cl::opt<cl::boolOrDefault> EnableGlobalISelOption(
>>> + "global-isel", cl::Hidden,
>>> + cl::desc("Enable the \"global\" instruction selector"));
>>>
>>> static cl::opt<std::string> PrintMachineInstrs(
>>> "print-machineinstrs", cl::ValueOptional, cl::desc("Print machine instrs"),
>>> @@ -704,19 +704,23 @@ void TargetPassConfig::addISelPrepare()
>>> }
>>>
>>> bool TargetPassConfig::addCoreISelPasses() {
>>> - // Enable FastISel with -fast, but allow that to be overridden.
>>> + // Enable FastISel with -fast-isel, but allow that to be overridden.
>>> TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE);
>>> if (EnableFastISelOption == cl::BOU_TRUE ||
>>> (TM->getOptLevel() == CodeGenOpt::None && TM->getO0WantsFastISel()))
>>> TM->setFastISel(true);
>>>
>>> - // Ask the target for an isel.
>>> - // Enable GlobalISel if the target wants to, but allow that to be overriden.
>>> + // Ask the target for an instruction selector.
>>> + bool EnableGlobalISel = TM->Options.EnableGlobalISel;
>>> // Explicitly enabling fast-isel should override implicitly enabled
>>> // global-isel.
>>> - if (EnableGlobalISel == cl::BOU_TRUE ||
>>> - (EnableGlobalISel == cl::BOU_UNSET && isGlobalISelEnabled() &&
>>> - EnableFastISelOption != cl::BOU_TRUE)) {
>>> + if (EnableGlobalISel && (EnableGlobalISelOption == cl::BOU_UNSET) &&
>>> + (EnableFastISelOption == cl::BOU_TRUE))
>>> + EnableGlobalISel = false;
>>> + if (EnableGlobalISelOption == cl::BOU_TRUE)
>>> + EnableGlobalISel = true;
>>> +
>>> + if (EnableGlobalISel) {
>>> if (addIRTranslator())
>>> return true;
>>>
>>> @@ -1130,18 +1134,13 @@ void TargetPassConfig::addBlockPlacement
>>> //===---------------------------------------------------------------------===//
>>> /// GlobalISel Configuration
>>> //===---------------------------------------------------------------------===//
>>> -
>>> -bool TargetPassConfig::isGlobalISelEnabled() const {
>>> - return false;
>>> -}
>>> -
>>> bool TargetPassConfig::isGlobalISelAbortEnabled() const {
>>> if (EnableGlobalISelAbort.getNumOccurrences() > 0)
>>> return EnableGlobalISelAbort == 1;
>>>
>>> // When no abort behaviour is specified, we don't abort if the target says
>>> // that GISel is enabled.
>>> - return !isGlobalISelEnabled();
>>> + return !TM->Options.EnableGlobalISel;
>>> }
>>>
>>> bool TargetPassConfig::reportDiagnosticWhenGlobalISelFallback() const {
>>>
>>> Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=322773&r1=322772&r2=322773&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
>>> +++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Wed Jan 17 14:34:21 2018
>>> @@ -243,6 +243,10 @@ AArch64TargetMachine::AArch64TargetMachi
>>> getEffectiveCodeModel(TT, CM, JIT), OL),
>>> TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) {
>>> initAsmInfo();
>>> +
>>> + // Enable GlobalISel at or below EnableGlobalISelAt0.
>>> + if (getOptLevel() <= EnableGlobalISelAtO)
>>> + setGlobalISel(true);
>>> }
>>>
>>> AArch64TargetMachine::~AArch64TargetMachine() = default;
>>> @@ -340,8 +344,6 @@ public:
>>> void addPostRegAlloc() override;
>>> void addPreSched2() override;
>>> void addPreEmitPass() override;
>>> -
>>> - bool isGlobalISelEnabled() const override;
>>> };
>>>
>>> } // end anonymous namespace
>>> @@ -455,10 +457,6 @@ bool AArch64PassConfig::addGlobalInstruc
>>> return false;
>>> }
>>>
>>> -bool AArch64PassConfig::isGlobalISelEnabled() const {
>>> - return TM->getOptLevel() <= EnableGlobalISelAtO;
>>> -}
>>> -
>>> bool AArch64PassConfig::addILPOpts() {
>>> if (EnableCondOpt)
>>> addPass(createAArch64ConditionOptimizerPass());
>>>
>>>
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>>> llvm-commits at lists.llvm.org
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>
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