[llvm] r322636 - [NFC] fix trivial typos in comments
Hiroshi Inoue via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 04:29:38 PST 2018
Author: inouehrs
Date: Wed Jan 17 04:29:38 2018
New Revision: 322636
URL: http://llvm.org/viewvc/llvm-project?rev=322636&view=rev
Log:
[NFC] fix trivial typos in comments
"the the" -> "the"
Modified:
llvm/trunk/lib/Analysis/LazyValueInfo.cpp
llvm/trunk/lib/Bitcode/Reader/MetadataLoader.cpp
llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp
llvm/trunk/lib/CodeGen/MachinePipeliner.cpp
llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
llvm/trunk/lib/CodeGen/RegisterPressure.cpp
Modified: llvm/trunk/lib/Analysis/LazyValueInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/LazyValueInfo.cpp?rev=322636&r1=322635&r2=322636&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/LazyValueInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp Wed Jan 17 04:29:38 2018
@@ -1830,7 +1830,7 @@ void LazyValueInfoAnnotatedWriter::emitI
};
printResult(ParentBB);
- // Print the LVI analysis results for the the immediate successor blocks, that
+ // Print the LVI analysis results for the immediate successor blocks, that
// are dominated by `ParentBB`.
for (auto *BBSucc : successors(ParentBB))
if (DT.dominates(ParentBB, BBSucc))
Modified: llvm/trunk/lib/Bitcode/Reader/MetadataLoader.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/MetadataLoader.cpp?rev=322636&r1=322635&r2=322636&view=diff
==============================================================================
--- llvm/trunk/lib/Bitcode/Reader/MetadataLoader.cpp (original)
+++ llvm/trunk/lib/Bitcode/Reader/MetadataLoader.cpp Wed Jan 17 04:29:38 2018
@@ -165,7 +165,7 @@ public:
/// necessary.
Metadata *getMetadataFwdRef(unsigned Idx);
- /// Return the the given metadata only if it is fully resolved.
+ /// Return the given metadata only if it is fully resolved.
///
/// Gives the same result as \a lookup(), unless \a MDNode::isResolved()
/// would give \c false.
Modified: llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp?rev=322636&r1=322635&r2=322636&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp (original)
+++ llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp Wed Jan 17 04:29:38 2018
@@ -198,7 +198,7 @@ class ImplicitNullChecks : public Machin
SuitabilityResult isSuitableMemoryOp(MachineInstr &MI, unsigned PointerReg,
ArrayRef<MachineInstr *> PrevInsts);
- /// Return true if \p FaultingMI can be hoisted from after the the
+ /// Return true if \p FaultingMI can be hoisted from after the
/// instructions in \p InstsSeenSoFar to before them. Set \p Dependence to a
/// non-null value if we also need to (and legally can) hoist a depedency.
bool canHoistInst(MachineInstr *FaultingMI, unsigned PointerReg,
Modified: llvm/trunk/lib/CodeGen/MachinePipeliner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachinePipeliner.cpp?rev=322636&r1=322635&r2=322636&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachinePipeliner.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachinePipeliner.cpp Wed Jan 17 04:29:38 2018
@@ -138,7 +138,7 @@ static cl::opt<bool> EnableSWPOptSize("e
/// A command line argument to limit minimum initial interval for pipelining.
static cl::opt<int> SwpMaxMii("pipeliner-max-mii",
- cl::desc("Size limit for the the MII."),
+ cl::desc("Size limit for the MII."),
cl::Hidden, cl::init(27));
/// A command line argument to limit the number of stages in the pipeline.
@@ -313,7 +313,7 @@ public:
/// Return the latest time an instruction my be scheduled.
int getALAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ALAP; }
- /// The mobility function, which the the number of slots in which
+ /// The mobility function, which the number of slots in which
/// an instruction may be scheduled.
int getMOV(SUnit *Node) { return getALAP(Node) - getASAP(Node); }
@@ -970,7 +970,7 @@ static unsigned getInitPhiReg(MachineIns
return 0;
}
-/// Return the Phi register value that comes the the loop block.
+/// Return the Phi register value that comes the loop block.
static unsigned getLoopPhiReg(MachineInstr &Phi, MachineBasicBlock *LoopBB) {
for (unsigned i = 1, e = Phi.getNumOperands(); i != e; i += 2)
if (Phi.getOperand(i + 1).getMBB() == LoopBB)
Modified: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp?rev=322636&r1=322635&r2=322636&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp Wed Jan 17 04:29:38 2018
@@ -399,7 +399,7 @@ class RAGreedy : public MachineFunctionP
/// obtained from the TargetSubtargetInfo.
bool EnableLocalReassign;
- /// Enable or not the the consideration of the cost of local intervals created
+ /// Enable or not the consideration of the cost of local intervals created
/// by a split candidate when choosing the best split candidate.
bool EnableAdvancedRASplitCost;
@@ -1448,7 +1448,7 @@ bool RAGreedy::splitCanCauseEvictionChai
getCheapestEvicteeWeight(Order, LIS->getInterval(Evictee),
Cand.Intf.first(), Cand.Intf.last(), &MaxWeight);
- // The bad eviction chain occurs when either the split candidate the the
+ // The bad eviction chain occurs when either the split candidate the
// evited reg or one of the split artifact will evict the evicting reg.
if ((PhysReg != Cand.PhysReg) && (PhysReg != FutureEvictedPhysReg))
return false;
Modified: llvm/trunk/lib/CodeGen/RegisterPressure.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterPressure.cpp?rev=322636&r1=322635&r2=322636&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterPressure.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterPressure.cpp Wed Jan 17 04:29:38 2018
@@ -587,7 +587,7 @@ void RegisterOperands::adjustLaneLivenes
for (auto I = Defs.begin(); I != Defs.end(); ) {
LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, I->RegUnit,
Pos.getDeadSlot());
- // If the the def is all that is live after the instruction, then in case
+ // If the def is all that is live after the instruction, then in case
// of a subregister def we need a read-undef flag.
unsigned RegUnit = I->RegUnit;
if (TargetRegisterInfo::isVirtualRegister(RegUnit) &&
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