[PATCH] D42031: [X86] Legalize v32i1 without BWI via splitting to v16i1 rather than the default of promoting to v32i8.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 130104.
craig.topper added a comment.

Add diffs for more v32i1 shuffle test case. I haven't commited the current versions of the tests to the repo yet, but you can see the before and after here.

Looks like we still have a regression when we have a shuffle between a v32i8 icmp and a v32i8 select. We could add a DAG combine to detect sign extends of i1 shuffles or i1 shuffles of truncates and adjust the type to match instead of somewhat arbitrarily picking a type to extend due to during lowering.


https://reviews.llvm.org/D42031

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/avg-mask.ll
  test/CodeGen/X86/avx512-insert-extract.ll
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/avx512-masked-memop-64-32.ll
  test/CodeGen/X86/avx512-vec-cmp.ll
  test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
  test/CodeGen/X86/bitcast-and-setcc-256.ll
  test/CodeGen/X86/bitcast-and-setcc-512.ll
  test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
  test/CodeGen/X86/bitcast-setcc-256.ll
  test/CodeGen/X86/bitcast-setcc-512.ll
  test/CodeGen/X86/vector-compare-results.ll
  test/CodeGen/X86/vector-shuffle-v1.ll