[PATCH] D42132: [RISCV] Fixed setting predicates for compressed instructions.

[Ana Pazos via Phabricator via llvm-commits]

apazos created this revision.
apazos added reviewers: asb, shiva0217.
Herald added subscribers: niosHD, sabuasal, jordy.potman.lists, simoncook, johnrusso, rbar.

Fixed setting predicates for compressed instructions.
Some instructions were being generated with C extension
enabled only, without proper checks for the other
required extensions like F, D and 32 and 64-bit target checks.
 Affected instructions:
C_FLD
C_FLW
C_LD
C_FSD
C_FSW
C_SD
C_JAL
C_ADDIW
C_SUBW
C_ADDW
C_FLDSP
C_FLWSP
C_LDSP
C_FSDSP
C_FSWSP
C_SDSP


https://reviews.llvm.org/D42132

Files:
  lib/Target/RISCV/RISCVInstrInfoC.td
  test/MC/RISCV/rv32c-ext-check1.s
  test/MC/RISCV/rv32c-ext-check2.s
  test/MC/RISCV/rv32c-rv64c-ext-check.s
  test/MC/RISCV/rv64c-ext-check.s

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