[PATCH] D42091: [X86] Move i1 shuffle legalizing from lowering to DAG combine

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 15 18:31:33 PST 2018


craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.

This patch promotes i1 shuffles to a wider type during DAG combine instead of lowering. This gives more opportunities for the truncate and extends needed by this process to be combined with other operations.

There is a regression on v32i1 in here. I'm hoping https://reviews.llvm.org/D42031 will help with that, but I haven't checked yet.

I had to add an additional target independent DAG combine to combine vector shuffle broadcasts and insert_element to the broadcasted element. Normally we catch this by turning the insert_element into a build_vector and then the shuffle will combine with that. But the new X86 combine here was promoting the vector_shuffle in some cases before we got a chance to convert the insert_element to build_vector so we missed the combine.


https://reviews.llvm.org/D42091

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vector-shuffle-v1.ll

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