[PATCH] D42088: [x86] shrink 'and' immediate values by setting the high bits (PR35907)

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: craig.topper, RKSimon, hfinkel.
Herald added subscribers: kristof.beyls, mcrosier, aemerson.

Try to reverse the constant-shrinking that happens in SimplifyDemandedBits() for 'and' masks when it results in a smaller immediate.

Other targets might want to share some of this logic by enabling this under a target hook, but I didn't see diffs for simple cases with PowerPC or AArch64, so I think they already have some specialized logic for this kind of thing.


https://reviews.llvm.org/D42088

Files:
  lib/Target/X86/X86ISelDAGToDAG.cpp
  test/CodeGen/X86/and-encoding.ll
  test/CodeGen/X86/divide-by-constant.ll
  test/CodeGen/X86/known-bits.ll
  test/CodeGen/X86/popcnt.ll
  test/CodeGen/X86/pr33844.ll
  test/CodeGen/X86/shift-pair.ll
  test/CodeGen/X86/urem-i8-constant.ll
  test/CodeGen/X86/vector-sext.ll
  test/CodeGen/X86/win64_frame.ll
  test/CodeGen/X86/x86-64-baseptr.ll
  test/CodeGen/X86/zext-fold.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D42088.129907.patch
Type: text/x-patch
Size: 31381 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180115/063436f4/attachment.bin>