[PATCH] D41578: [SCEV] Do not cache S -> V if S is not equivalent of V

[Evgeny Astigeevich via Phabricator via llvm-commits]

eastig added a comment.

In https://reviews.llvm.org/D41578#975919, @skatkov wrote:

> Hi Evgeny, please let me know if you need some more deep explanation about workaround Sanjoy and I mentioned in terms of stripping nuw/nsw for instruction in case you are in LSR.
>
> This is for the case: the regressions are urgent for you and you need some quick workaround while you are investigating why SCEV lost the poison flags.


I am working on a reproducer. The IR causing the issue is a result of LTO. It's huge and has a lot of loops. As soon as I reduce it to something small I'll start debugging.

Thanks,
Evgeny


Repository:
  rL LLVM

https://reviews.llvm.org/D41578