[PATCH] D42042: [X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: lib/Target/X86/X86InstrInfo.cpp:10083
+    if (MI.getOperand(NumOperands - 1).isImm()) {
+      assert((!Repeat || ImmWidth == 16) && "Illegal VPBLENDWY mask");
+      unsigned Imm = MI.getOperand(NumOperands - 1).getImm();
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Could we just detect ImmWidth == 16 instead of having a Repeat flag?


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Comment at: lib/Target/X86/X86InstrInfo.cpp:10085
+      unsigned Imm = MI.getOperand(NumOperands - 1).getImm();
+      Imm = (Repeat ? ((Imm & 255) << 8) | (Imm & 255) : Imm);
+      unsigned NewImm = Imm;
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Can we mask the immediate to 8-bits on the previous line so we don't need two ands on this line?


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Comment at: lib/Target/X86/X86InstrInfo.cpp:10101
+          else {
+            AdjustBlendMask(Imm, ImmWidth, Is256 ? 16 : 8, &NewImm);
+            assert((!Is256 || ((NewImm >> 8) & 255) == (NewImm & 255)) &&
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Does this branch only happen when the starting instruction was a BLENDW? And that means that the table is pointing at ReplaceableCustomInstrs not ReplaceableCustomAVX2Instrs?


Repository:
  rL LLVM

https://reviews.llvm.org/D42042