[llvm] r322459 - [X86][SSE] Support combining MOVLHPS undef inputs
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 14 10:50:34 PST 2018
Author: rksimon
Date: Sun Jan 14 10:50:34 2018
New Revision: 322459
URL: http://llvm.org/viewvc/llvm-project?rev=322459&view=rev
Log:
[X86][SSE] Support combining MOVLHPS undef inputs
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=322459&r1=322458&r2=322459&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Jan 14 10:50:34 2018
@@ -28233,6 +28233,7 @@ static bool matchBinaryVectorShuffle(MVT
if (MaskVT.is128BitVector()) {
if (isTargetShuffleEquivalent(Mask, {0, 0}) && AllowFloatDomain) {
V2 = V1;
+ V1 = (SM_SentinelUndef == Mask[0] ? DAG.getUNDEF(MVT::v4f32) : V1);
Shuffle = X86ISD::MOVLHPS;
SrcVT = DstVT = MVT::v4f32;
return true;
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.ll?rev=322459&r1=322458&r2=322459&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-128-v2.ll Sun Jan 14 10:50:34 2018
@@ -301,8 +301,7 @@ define <2 x double> @shuffle_v2f64_21(<2
define <2 x double> @shuffle_v2f64_u2(<2 x double> %a, <2 x double> %b) {
; SSE2-LABEL: shuffle_v2f64_u2:
; SSE2: # %bb.0:
-; SSE2-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0,0]
-; SSE2-NEXT: movaps %xmm1, %xmm0
+; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE2-NEXT: retq
;
; SSE3-LABEL: shuffle_v2f64_u2:
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