[PATCH] D41879: [X86] Added support for nocf_check attribute for indirect Branch Tracking

[Oren Ben Simhon via Phabricator via llvm-commits]

oren_ben_simhon added inline comments.


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Comment at: lib/Target/X86/X86InstrSystem.td:564
+let Predicates = [HasIBT] in
+  def : Pat<(X86nocf_check_calljmp), (DS_PREFIX)>;
+
----------------
craig.topper wrote:
> I'm not sure I like feel very safe emitting the DS_PREFIX as a separate instruction. The glue won't exist after the SelectionDAG is converted to MIR so I'm not sure we would be guaranteed to keep it together.
> 
> I think I'd rather see special flavors of CALL*r/JMP*r that have a DS_PREFIX bit set in the TSFlags for their opcode and then the code emitter would know to emit the prefix. Basically what we do with LOCK and REP today. That way the instruction is one machine IR instruction that can never be separated.
I share your concern. That is why I added the glue (for SelectionDAG) and X86nocf_check_calljmp pattern (for MI), which will make sure that only DS_PREFIX that precedes indirect jmp/call will be lowered.

Your solution means that i need to double the number of JMP/CALL MIs and DAG nodes. correct?
I am not sure that the cost is fair for esoteric feature like nocf_check prefix.

If you are still worried about future passes that change the order, what do you think about creating a bundle instead (DS_PREFIX<->JMP/CALL)?


Repository:
  rL LLVM

https://reviews.llvm.org/D41879