[llvm] r322297 - X86 Tests: Add zext cases in (trunc (subvector)) test. NFC
Zvi Rackover via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 11 09:50:35 PST 2018
Author: zvi
Date: Thu Jan 11 09:50:34 2018
New Revision: 322297
URL: http://llvm.org/viewvc/llvm-project?rev=322297&view=rev
Log:
X86 Tests: Add zext cases in (trunc (subvector)) test. NFC
Cases were missing as observed in D41927
Modified:
llvm/trunk/test/CodeGen/X86/trunc-subvector.ll
Modified: llvm/trunk/test/CodeGen/X86/trunc-subvector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/trunc-subvector.ll?rev=322297&r1=322296&r2=322297&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/trunc-subvector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/trunc-subvector.ll Thu Jan 11 09:50:34 2018
@@ -158,3 +158,141 @@ define <2 x i32> @test5(<8 x i32> %v) {
%t = trunc <2 x i64> %s to <2 x i32>
ret <2 x i32> %t
}
+
+define <4 x i32> @test6(<8 x i32> %v) {
+; SSE2-LABEL: test6:
+; SSE2: # %bb.0:
+; SSE2-NEXT: retq
+;
+; AVX2-LABEL: test6:
+; AVX2: # %bb.0:
+; AVX2-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: test6:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
+; AVX512-NEXT: vpmovqd %zmm0, %ymm0
+; AVX512-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %x = zext <8 x i32> %v to <8 x i64>
+ %s = shufflevector <8 x i64> %x, <8 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
+ %t = trunc <4 x i64> %s to <4 x i32>
+ ret <4 x i32> %t
+}
+
+define <4 x i32> @test7(<8 x i32> %v) {
+; SSE2-LABEL: test7:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movaps %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; AVX2-LABEL: test7:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vextractf128 $1, %ymm0, %xmm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: test7:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
+; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm0
+; AVX512-NEXT: vpmovqd %zmm0, %ymm0
+; AVX512-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %x = zext <8 x i32> %v to <8 x i64>
+ %s = shufflevector <8 x i64> %x, <8 x i64> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
+ %t = trunc <4 x i64> %s to <4 x i32>
+ ret <4 x i32> %t
+}
+
+define <2 x i32> @test8(<8 x i32> %v) {
+; SSE2-LABEL: test8:
+; SSE2: # %bb.0:
+; SSE2-NEXT: xorps %xmm0, %xmm0
+; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
+; SSE2-NEXT: movaps %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; AVX2-LABEL: test8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: test8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
+; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %x = zext <8 x i32> %v to <8 x i64>
+ %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 4, i32 5>
+ %t = trunc <2 x i64> %s to <2 x i32>
+ ret <2 x i32> %t
+}
+
+define <2 x i32> @test9(<8 x i32> %v) {
+; SSE2-LABEL: test9:
+; SSE2: # %bb.0:
+; SSE2-NEXT: xorps %xmm1, %xmm1
+; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT: retq
+;
+; AVX2-LABEL: test9:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: test9:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
+; AVX512-NEXT: # kill: def %xmm0 killed %xmm0 killed %zmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %x = zext <8 x i32> %v to <8 x i64>
+ %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 0, i32 1>
+ %t = trunc <2 x i64> %s to <2 x i32>
+ ret <2 x i32> %t
+}
+
+define <2 x i32> @test10(<8 x i32> %v) {
+; SSE2-LABEL: test10:
+; SSE2: # %bb.0:
+; SSE2-NEXT: xorpd %xmm2, %xmm2
+; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
+; SSE2-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2],xmm2[2],xmm0[3],xmm2[3]
+; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
+; SSE2-NEXT: retq
+;
+; AVX2-LABEL: test10:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vpalignr {{.*#+}} ymm0 = ymm1[8,9,10,11,12,13,14,15],ymm0[0,1,2,3,4,5,6,7],ymm1[24,25,26,27,28,29,30,31],ymm0[16,17,18,19,20,21,22,23]
+; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,1,2,3]
+; AVX2-NEXT: # kill: def %xmm0 killed %xmm0 killed %ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: test10:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
+; AVX512-NEXT: vextracti32x4 $2, %zmm0, %xmm1
+; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm0
+; AVX512-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %x = zext <8 x i32> %v to <8 x i64>
+ %s = shufflevector <8 x i64> %x, <8 x i64> undef, <2 x i32> <i32 3, i32 4>
+ %t = trunc <2 x i64> %s to <2 x i32>
+ ret <2 x i32> %t
+}
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