[PATCH] D41949: [RISCV] [WIP] implement li pseudo instruction

[Mario Werner via Phabricator via llvm-commits]

niosHD created this revision.
niosHD added a reviewer: asb.
Herald added subscribers: sabuasal, apazos, jordy.potman.lists, simoncook, johnrusso, rbar, arichardson, sdardis.

The implementation follows the MIPS backend and expands the pseudo instruction directly during asm parsing. As the result, only real MC instructions are emitted to the MCStreamer.

Currently only support for 32-bit constants is implemented. Support for 64-bit constants (on RV64) will be added when the overall approach is approved. Comments are welcome. :)


https://reviews.llvm.org/D41949

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/RISCVInstrFormats.td
  lib/Target/RISCV/RISCVInstrInfo.td
  test/MC/RISCV/rv32i-aliases-invalid.s
  test/MC/RISCV/rv64i-aliases-invalid.s
  test/MC/RISCV/rvi-aliases-valid.s

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