[PATCH] D41126: [SelectionDAG] Fixed f16-from-vector promotion problem

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:175
+      && Op.getValueType().getVectorNumElements() == 1)
+    Op = GetScalarizedVector(Op);
   EVT NewVT = N->getValueType(0).getVectorElementType();
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arsenm wrote:
> Can you add an assert that the v1 type isn't legal?
Hi,
The added assert is causing issues in our AArch64 tests... why is it necessary?


Repository:
  rL LLVM

https://reviews.llvm.org/D41126