[PATCH] D38906: AMDGPU/SI: Implement d16 support for buffer intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3508-3509
+// This is to lower INTRINSIC_W_CHAIN with illegal result types.
+SDValue SITargetLowering::lowerIntrinsicWChain(SDValue Op, SDValue &Chain,
+                                               SelectionDAG &DAG) const {
+  EVT LoadVT = Op.getValueType();
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We already have LowerINTRINSIC_W_CHAIN, so this name could be confusing


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3564
+  Chain = Res.getValue(1);
+  if (Unpacked) { // From v2i32/v4i32 back to v2f16/v4f16.
+    // Truncate to v2i16/v4i16.
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Move this into a helper function called in each switch rather than putting code after the switch. Not every intrinsic with an illegal type will necessarily be this situation


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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:3569
+    // Bitcast to original type (v2f16/v4f16).
+    return DAG.getNode(ISD::BITCAST, DL, LoadVT, Trunc);
+  } else // Cast back to the original packed type.
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No return after else


https://reviews.llvm.org/D38906