[llvm] r322207 - [MachineOutliner] Outline ADRPs
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 10 10:49:57 PST 2018
Author: paquette
Date: Wed Jan 10 10:49:57 2018
New Revision: 322207
URL: http://llvm.org/viewvc/llvm-project?rev=322207&view=rev
Log:
[MachineOutliner] Outline ADRPs
ADRP instructions weren't being outlined because they're PC-relative and thus
fail the LR checks. This patch adds a special case for ADRPs to
getOutliningType to make sure that ADRPs can be outlined and updates the MIR
test.
Modified:
llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/trunk/test/CodeGen/AArch64/machine-outliner.mir
Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp?rev=322207&r1=322206&r2=322207&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp Wed Jan 10 10:49:57 2018
@@ -4841,6 +4841,12 @@ AArch64InstrInfo::getOutliningType(Machi
return MachineOutlinerInstrType::Illegal;
}
+ // Special cases for instructions that can always be outlined, but will fail
+ // the later tests. e.g, ADRPs, which are PC-relative use LR, but can always
+ // be outlined because they don't require a *specific* value to be in LR.
+ if (MI.getOpcode() == AArch64::ADRP)
+ return MachineOutlinerInstrType::Legal;
+
// Outline calls without stack parameters or aggregate parameters.
if (MI.isCall()) {
const Module *M = MF->getFunction().getParent();
Modified: llvm/trunk/test/CodeGen/AArch64/machine-outliner.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/machine-outliner.mir?rev=322207&r1=322206&r2=322207&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/machine-outliner.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/machine-outliner.mir Wed Jan 10 10:49:57 2018
@@ -1,6 +1,8 @@
# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner %s -o - | FileCheck %s
--- |
+ @x = common global i32 0, align 4
+
define void @baz() #0 {
ret void
}
@@ -58,6 +60,7 @@ body: |
%w16 = ORRWri %wzr, 1
%w16 = ORRWri %wzr, 1
%w16 = ORRWri %wzr, 1
+ renamable %x9 = ADRP target-flags(aarch64-page) @x
%x16 = ADDXri %sp, 48, 0;
STRHHroW %w16, %x9, %w30, 1, 1
%lr = ORRXri %xzr, 1
@@ -70,6 +73,7 @@ body: |
%w16 = ORRWri %wzr, 1
%w16 = ORRWri %wzr, 1
%w16 = ORRWri %wzr, 1
+ renamable %x9 = ADRP target-flags(aarch64-page) @x
%x16 = ADDXri %sp, 48, 0;
STRHHroW %w16, %x9, %w30, 1, 1
%lr = ORRXri %xzr, 1
@@ -83,6 +87,7 @@ body: |
%w16 = ORRWri %wzr, 1
%w16 = ORRWri %wzr, 1
%w16 = ORRWri %wzr, 1
+ renamable %x9 = ADRP target-flags(aarch64-page) @x
%x16 = ADDXri %sp, 48, 0;
STRHHroW %w16, %x9, %w30, 1, 1
%lr = ORRXri %xzr, 1
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