[PATCH] D41856: [PowerPC] Zero-extend the compare operand for ATOMIC_CMP_SWAP

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

In https://reviews.llvm.org/D41856#971516, @efriedma wrote:

> With this approach, I'm a little worried it will break in the future.  For stores, DAGCombine calls SimplifyDemandedBits to simplify the input; if someone added the same functionality for atomic operations, it would break this check.


Do you mean that the general approach of updating the nodes during custom legalization is fragile or just because I used my own check for already zero-extended values? I am assuming that if I use `MaskedValueIsZero()` it should be safe since if this code can't prove the high bits aren't set, neither will `SimplifyDemandedBits` so it shouldn't undo what this code does.



================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:8819
+// Test if an SDValue is zero-extended from  \p From bits to \p To bits.
+static bool isZeroExtended(SDValue Op, unsigned From, unsigned To) {
+  if (To < From)
----------------
efriedma wrote:
> Can you simplify this using MaskedValueIsZero?
Thank you. I was looking for something with similar semantics but I was assuming it would have a name suggestive of zero-extension. This looks like it does exactly what I want.


Repository:
  rL LLVM

https://reviews.llvm.org/D41856