[llvm] r322162 - [ARM GlobalISel] Legalize G_CONSTANT for scalars > 32 bits
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 10 01:32:02 PST 2018
Author: rovka
Date: Wed Jan 10 01:32:01 2018
New Revision: 322162
URL: http://llvm.org/viewvc/llvm-project?rev=322162&view=rev
Log:
[ARM GlobalISel] Legalize G_CONSTANT for scalars > 32 bits
Make G_CONSTANT narrow for any scalars larger than 32 bits.
Modified:
llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
Modified: llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp?rev=322162&r1=322161&r2=322162&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMLegalizerInfo.cpp Wed Jan 10 01:32:01 2018
@@ -59,7 +59,7 @@ widen_8_16(const LegalizerInfo::SizeAndA
}
static LegalizerInfo::SizeAndActionsVec
-widen_1_8_16(const LegalizerInfo::SizeAndActionsVec &v) {
+widen_1_8_16_narrowToLargest(const LegalizerInfo::SizeAndActionsVec &v) {
assert(v.size() >= 1);
assert(v[0].first > 17);
LegalizerInfo::SizeAndActionsVec result = {
@@ -68,7 +68,7 @@ widen_1_8_16(const LegalizerInfo::SizeAn
{16, LegalizerInfo::WidenScalar}, {17, LegalizerInfo::Unsupported}};
addAndInterleaveWithUnsupported(result, v);
auto Largest = result.back().first;
- result.push_back({Largest + 1, LegalizerInfo::Unsupported});
+ result.push_back({Largest + 1, LegalizerInfo::NarrowScalar});
return result;
}
@@ -151,7 +151,8 @@ ARMLegalizerInfo::ARMLegalizerInfo(const
setAction({G_CONSTANT, s32}, Legal);
setAction({G_CONSTANT, p0}, Legal);
- setLegalizeScalarToDifferentSizeStrategy(G_CONSTANT, 0, widen_1_8_16);
+ setLegalizeScalarToDifferentSizeStrategy(G_CONSTANT, 0,
+ widen_1_8_16_narrowToLargest);
setAction({G_ICMP, s1}, Legal);
setLegalizeScalarToDifferentSizeStrategy(G_ICMP, 1,
Modified: llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir?rev=322162&r1=322161&r2=322162&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir (original)
+++ llvm/trunk/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir Wed Jan 10 01:32:01 2018
@@ -879,6 +879,9 @@ registers:
- { id: 3, class: _ }
- { id: 4, class: _ }
- { id: 5, class: _ }
+ - { id: 6, class: _ }
+ - { id: 7, class: _ }
+ - { id: 8, class: _ }
body: |
bb.0:
liveins: %r0
@@ -913,6 +916,14 @@ body: |
G_STORE %5(p0), %4(p0) :: (store 4)
; CHECK: {{%[0-9]+}}:_(p0) = G_CONSTANT 0
+ %6(s64) = G_CONSTANT i64 17179869200 ; = 4 * 2 ^ 32 + 16
+ %7(s32), %8(s32) = G_UNMERGE_VALUES %6(s64)
+ G_STORE %7(s32), %4(p0) :: (store 4)
+ G_STORE %8(s32), %4(p0) :: (store 4)
+ ; CHECK-DAG: {{%[0-9]+}}:_(s32) = G_CONSTANT i32 4
+ ; CHECK-DAG: {{%[0-9]+}}:_(s32) = G_CONSTANT i32 16
+ ; CHECK-NOT: G_CONSTANT i64
+
%r0 = COPY %0(s32)
BX_RET 14, %noreg, implicit %r0
...
More information about the llvm-commits
mailing list