[llvm] r322071 - [MIR] Add support for the frame-destroy MachineInstr flag
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 9 03:33:22 PST 2018
Author: thegameg
Date: Tue Jan 9 03:33:22 2018
New Revision: 322071
URL: http://llvm.org/viewvc/llvm-project?rev=322071&view=rev
Log:
[MIR] Add support for the frame-destroy MachineInstr flag
We are printing / parsing the `frame-setup` MachineInstr flag but not
the `frame-destroy` one.
Differential Revision: https://reviews.llvm.org/D41509
Modified:
llvm/trunk/docs/MIRLangRef.rst
llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
llvm/trunk/lib/CodeGen/MIRPrinter.cpp
llvm/trunk/test/CodeGen/AArch64/arm64-csldst-mmo.ll
llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
Modified: llvm/trunk/docs/MIRLangRef.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/MIRLangRef.rst?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/docs/MIRLangRef.rst (original)
+++ llvm/trunk/docs/MIRLangRef.rst Tue Jan 9 03:33:22 2018
@@ -365,12 +365,17 @@ machine instructions.
Instruction Flags
^^^^^^^^^^^^^^^^^
-The flag ``frame-setup`` can be specified before the instruction's name:
+The flag ``frame-setup`` or ``frame-destroy`` can be specified before the
+instruction's name:
.. code-block:: text
%fp = frame-setup ADDXri %sp, 0, 0
+.. code-block:: text
+
+ %x21, %x20 = frame-destroy LDPXi %sp
+
.. _registers:
Registers
Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp Tue Jan 9 03:33:22 2018
@@ -211,6 +211,7 @@ static MIToken::TokenKind getIdentifierK
.Case("renamable", MIToken::kw_renamable)
.Case("tied-def", MIToken::kw_tied_def)
.Case("frame-setup", MIToken::kw_frame_setup)
+ .Case("frame-destroy", MIToken::kw_frame_destroy)
.Case("debug-location", MIToken::kw_debug_location)
.Case("same_value", MIToken::kw_cfi_same_value)
.Case("offset", MIToken::kw_cfi_offset)
Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.h?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.h (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.h Tue Jan 9 03:33:22 2018
@@ -63,6 +63,7 @@ struct MIToken {
kw_renamable,
kw_tied_def,
kw_frame_setup,
+ kw_frame_destroy,
kw_debug_location,
kw_cfi_same_value,
kw_cfi_offset,
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Tue Jan 9 03:33:22 2018
@@ -925,6 +925,9 @@ bool MIParser::parseInstruction(unsigned
if (Token.is(MIToken::kw_frame_setup)) {
Flags |= MachineInstr::FrameSetup;
lex();
+ } else if (Token.is(MIToken::kw_frame_destroy)) {
+ Flags |= MachineInstr::FrameDestroy;
+ lex();
}
if (Token.isNot(MIToken::Identifier))
return error("expected a machine instruction");
Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Tue Jan 9 03:33:22 2018
@@ -670,6 +670,9 @@ void MIPrinter::print(const MachineInstr
OS << " = ";
if (MI.getFlag(MachineInstr::FrameSetup))
OS << "frame-setup ";
+ else if (MI.getFlag(MachineInstr::FrameDestroy))
+ OS << "frame-destroy ";
+
OS << TII->getName(MI.getOpcode());
if (I < E)
OS << ' ';
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-csldst-mmo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-csldst-mmo.ll?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-csldst-mmo.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-csldst-mmo.ll Tue Jan 9 03:33:22 2018
@@ -11,7 +11,7 @@
; CHECK: Before post-MI-sched:
; CHECK-LABEL: # Machine code for function test1:
; CHECK: SU(2): STRWui %wzr
-; CHECK: SU(3): %x21, %x20 = LDPXi %sp
+; CHECK: SU(3): %x21, %x20 = LDPXi %sp, 2; flags: FrameDestroy
; CHECK: Predecessors:
; CHECK-NEXT: SU(0): Out
; CHECK-NEXT: SU(0): Out
Modified: llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir?rev=322071&r1=322070&r2=322071&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir Tue Jan 9 03:33:22 2018
@@ -30,6 +30,7 @@ body: |
; CHECK: frame-setup PUSH64r %rax
frame-setup PUSH64r %rax, implicit-def %rsp, implicit %rsp
CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
- %rdx = POP64r implicit-def %rsp, implicit %rsp
+ ; CHECK: %rdx = frame-destroy POP64r
+ %rdx = frame-destroy POP64r implicit-def %rsp, implicit %rsp
RETQ %eax
...
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