[PATCH] D41811: X86: Add pattern matching for PMADDWD
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 8 01:30:43 PST 2018
RKSimon added inline comments.
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Comment at: test/CodeGen/X86/madd.ll:358
; SSE2-NEXT: paddd %xmm5, %xmm0
; SSE2-NEXT: retq
;
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zvi wrote:
> RKSimon wrote:
> > Whats missing to get SSE2 to lower to 2 x pmaddwd? (TBH I'm more interested in AVX1 but it'd be good for SSE as well).
> That's a good idea. Though it might be tricky to split the 'mul' operands so that type-legalization won't mess-up illegal types. I can try to rework this patch or leave it as a follow-up if it gets too messy.
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I did something similar in D41440 for PAVG - we could pull out and generalize the 'LowerToAVG' code to split into legal ops and concat the results.
https://reviews.llvm.org/D41811
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