[llvm] r321549 - Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
Andrew V. Tischenko via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 29 00:31:01 PST 2017
Author: avt77
Date: Fri Dec 29 00:31:01 2017
New Revision: 321549
URL: http://llvm.org/viewvc/llvm-project?rev=321549&view=rev
Log:
Fix incorrect operand sizes for some MMX instructions: punpcklwd, punpcklbw and punpckldq.
Differential Revision: https://reviews.llvm.org/D41595
Modified:
llvm/trunk/lib/Target/X86/X86InstrMMX.td
llvm/trunk/test/MC/X86/intel-syntax-error.s
llvm/trunk/test/MC/X86/intel-syntax.s
llvm/trunk/test/MC/X86/x86_64-asm-match.s
Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=321549&r1=321548&r2=321549&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Fri Dec 29 00:31:01 2017
@@ -94,7 +94,8 @@ let Constraints = "$src1 = $dst" in {
// MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
// When this is cleaned up, remove the FIXME from X86RecognizableInstr.cpp.
multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId,
- OpndItins itins, bit Commutable = 0> {
+ OpndItins itins, bit Commutable = 0,
+ X86MemOperand OType = i64mem> {
def irr : MMXI<opc, MRMSrcReg, (outs VR64:$dst),
(ins VR64:$src1, VR64:$src2),
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
@@ -103,7 +104,7 @@ let Constraints = "$src1 = $dst" in {
let isCommutable = Commutable;
}
def irm : MMXI<opc, MRMSrcMem, (outs VR64:$dst),
- (ins VR64:$src1, i64mem:$src2),
+ (ins VR64:$src1, OType:$src2),
!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
[(set VR64:$dst, (IntId VR64:$src1,
(bitconvert (load_mmx addr:$src2))))],
@@ -524,13 +525,16 @@ defm MMX_PUNPCKHDQ : MMXI_binop_rm_int<0
MMX_UNPCK_H_ITINS>;
defm MMX_PUNPCKLBW : MMXI_binop_rm_int<0x60, "punpcklbw",
int_x86_mmx_punpcklbw,
- MMX_UNPCK_L_ITINS>;
+ MMX_UNPCK_L_ITINS,
+ 0, i32mem>;
defm MMX_PUNPCKLWD : MMXI_binop_rm_int<0x61, "punpcklwd",
int_x86_mmx_punpcklwd,
- MMX_UNPCK_L_ITINS>;
+ MMX_UNPCK_L_ITINS,
+ 0, i32mem>;
defm MMX_PUNPCKLDQ : MMXI_binop_rm_int<0x62, "punpckldq",
int_x86_mmx_punpckldq,
- MMX_UNPCK_L_ITINS>;
+ MMX_UNPCK_L_ITINS,
+ 0, i32mem>;
// -- Pack Instructions
defm MMX_PACKSSWB : MMXI_binop_rm_int<0x63, "packsswb", int_x86_mmx_packsswb,
Modified: llvm/trunk/test/MC/X86/intel-syntax-error.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax-error.s?rev=321549&r1=321548&r2=321549&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-error.s (original)
+++ llvm/trunk/test/MC/X86/intel-syntax-error.s Fri Dec 29 00:31:01 2017
@@ -34,3 +34,13 @@ lea RDX, [4 * RAX + 27 * RBX + _pat]
lea RDX, [[arr]
//CHECK: error: unexpected bracket encountered
lea RDX, [arr[]
+
+.intel_syntax
+
+// CHECK: error: invalid operand for instruction
+punpcklbw mm0, qword ptr [rsp]
+// CHECK: error: invalid operand for instruction
+punpcklwd mm0, word ptr [rsp]
+// CHECK: error: invalid operand for instruction
+punpckldq mm0, qword ptr [rsp]
+
Modified: llvm/trunk/test/MC/X86/intel-syntax.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax.s?rev=321549&r1=321548&r2=321549&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/intel-syntax.s (original)
+++ llvm/trunk/test/MC/X86/intel-syntax.s Fri Dec 29 00:31:01 2017
@@ -867,3 +867,11 @@ movsd qword ptr [rax], xmm0
xlat byte ptr [eax]
// CHECK: xlatb
// CHECK-STDERR: memory operand is only for determining the size, (R|E)BX will be used for the location
+
+// CHECK: punpcklbw
+punpcklbw mm0, dword ptr [rsp]
+// CHECK: punpcklwd
+punpcklwd mm0, dword ptr [rsp]
+// CHECK: punpckldq
+punpckldq mm0, dword ptr [rsp]
+
Modified: llvm/trunk/test/MC/X86/x86_64-asm-match.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_64-asm-match.s?rev=321549&r1=321548&r2=321549&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86_64-asm-match.s (original)
+++ llvm/trunk/test/MC/X86/x86_64-asm-match.s Fri Dec 29 00:31:01 2017
@@ -39,7 +39,7 @@
// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 2 (): Opcode result: multiple operand mismatches, ignoring this opcode
// CHECK:Trying to match opcode MMX_PUNPCKLBWirm
// CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (): match success using generic matcher
-// CHECK: Matching formal operand class MCK_Mem64 against actual operand at index 2 (): match success using generic matcher
+// CHECK: Matching formal operand class MCK_Mem32 against actual operand at index 2 (): match success using generic matcher
// CHECK: Matching formal operand class InvalidMatchClass against actual operand at index 3: actual operand index out of range Opcode result: complete match, selecting this opcode
@@ -49,4 +49,4 @@ pinsrw $3, %ecx, %xmm5
crc32l %gs:0xdeadbeef(%rbx,%rcx,8),%ecx
.intel_syntax
-punpcklbw mm0, qword ptr [rsp]
+punpcklbw mm0, dword ptr [rsp]
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