[llvm] r321537 - [X86] Use ISD::CONCAT_VECTORS when splitting 256-bit loads in combineLoad.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Thu Dec 28 11:46:06 2017
New Revision: 321537

URL: http://llvm.org/viewvc/llvm-project?rev=321537&view=rev
Log:
[X86] Use ISD::CONCAT_VECTORS when splitting 256-bit loads in combineLoad.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=321537&r1=321536&r2=321537&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 28 11:46:06 2017
@@ -34057,9 +34057,7 @@ static SDValue combineLoad(SDNode *N, Se
                              Load1.getValue(1),
                              Load2.getValue(1));
 
-    SDValue NewVec = DAG.getUNDEF(RegVT);
-    NewVec = insert128BitVector(NewVec, Load1, 0, DAG, dl);
-    NewVec = insert128BitVector(NewVec, Load2, NumElems / 2, DAG, dl);
+    SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2);
     return DCI.CombineTo(N, NewVec, TF, true);
   }