[llvm] r321399 - [X86] Pass the right VT to the getZeroExtendInReg introduced in r321398

[Craig Topper via llvm-commits]

Author: ctopper
Date: Fri Dec 22 22:52:03 2017
New Revision: 321399

URL: http://llvm.org/viewvc/llvm-project?rev=321399&view=rev
Log:
[X86] Pass the right VT to the getZeroExtendInReg introduced in r321398

Apparently we don't have tests for this which I didn't realize before. I'll try to fix that but wanted to fix the obvious bug.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=321399&r1=321398&r2=321399&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Dec 22 22:52:03 2017
@@ -33077,7 +33077,7 @@ static SDValue WidenMaskArithmetic(SDNod
   case ISD::ANY_EXTEND:
     return Op;
   case ISD::ZERO_EXTEND:
-    return DAG.getZeroExtendInReg(Op, DL, VT.getScalarType());
+    return DAG.getZeroExtendInReg(Op, DL, NarrowVT.getScalarType());
   case ISD::SIGN_EXTEND:
     return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT,
                        Op, DAG.getValueType(NarrowVT));