[PATCH] D39912: AMDGPU/SI: Implement d16 support for image intrinsics
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 22 12:18:28 PST 2017
arsenm added inline comments.
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:549
+static unsigned getImageOpcode (unsigned IID) {
+ switch (IID) {
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Extra space before (, can use Intrinsic::ID type
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:551
+ switch (IID) {
+ case Intrinsic::amdgcn_image_load : return AMDGPUISD::IMAGE_LOAD;
+ case Intrinsic::amdgcn_image_load_mip : return AMDGPUISD::IMAGE_LOAD_MIP;
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Returns on separte line
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:4906-4908
+ SDValue VData = Op.getOperand(2);
+ EVT StoreVT = VData.getValueType();
+ if (isHalfVT(StoreVT)) {
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Can't you reuse the type convert function from the buffer patch?
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Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:7125
+ //int D16Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::d16);
+ //if (D16Idx > 0 && MI.getOperand(D16Idx).getImm() != 0)
+ if (TII->isD16(MI))
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Dead code. Comment isn't helpful, this is a TODO to implement this optimization for d16. Can you open a bug for that?.
For the unpacked case I would expect it to be trivial to extend for it
https://reviews.llvm.org/D39912
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