[PATCH] D41447: [AArch64][SVE] Asm: Negative tests for predicated ADD/SUB register constraints

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
sdesmalen added reviewers: rengolin, mcrosier, evandro, fhahn, echristo.
Herald added subscribers: kristof.beyls, tschuett, javed.absar, aemerson.

Patch [3/3] in a series to add operand constraint checks for SVE's predicated ADD/SUB.


https://reviews.llvm.org/D41447

Files:
  test/MC/AArch64/SVE/add-diagnostics.s
  test/MC/AArch64/SVE/sub-diagnostics.s


Index: test/MC/AArch64/SVE/sub-diagnostics.s
===================================================================
--- test/MC/AArch64/SVE/sub-diagnostics.s
+++ test/MC/AArch64/SVE/sub-diagnostics.s
@@ -53,3 +53,27 @@
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
 // CHECK-NEXT: sub z29.d, p7, z29.d, z8.d
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+sub z25.b, p4/m, z26.b, z2.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: sub z25.b, p4/m, z26.b, z2.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+sub z29.h, p6/m, z30.h, z20.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: sub z29.h, p6/m, z30.h, z20.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+sub z14.s, p2/m, z15.s, z21.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: sub z14.s, p2/m, z15.s, z21.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+sub z2.d, p5/m, z3.d, z11.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: sub z2.d, p5/m, z3.d, z11.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file
Index: test/MC/AArch64/SVE/add-diagnostics.s
===================================================================
--- test/MC/AArch64/SVE/add-diagnostics.s
+++ test/MC/AArch64/SVE/add-diagnostics.s
@@ -53,3 +53,27 @@
 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
 // CHECK-NEXT: add z29.d, p7, z29.d, z8.d
 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+add z19.b, p4/m, z20.b, z13.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: add z19.b, p4/m, z20.b, z13.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+add z9.h, p3/m, z10.h, z28.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: add z9.h, p3/m, z10.h, z28.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+add z5.s, p3/m, z6.s, z18.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: add z5.s, p3/m, z6.s, z18.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+// Source and Destination Registers must match
+add z9.d, p4/m, z10.d, z7.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
+// CHECK-NEXT: add z9.d, p4/m, z10.d, z7.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
\ No newline at end of file


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