[llvm] r321112 - [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::print
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 19 13:47:10 PST 2017
Author: thegameg
Date: Tue Dec 19 13:47:10 2017
New Revision: 321112
URL: http://llvm.org/viewvc/llvm-project?rev=321112&view=rev
Log:
[CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the
interfaces.
Modified:
llvm/trunk/docs/MIRLangRef.rst
llvm/trunk/lib/CodeGen/MIRPrinter.cpp
llvm/trunk/lib/CodeGen/MachineOperand.cpp
llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp
Modified: llvm/trunk/docs/MIRLangRef.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/MIRLangRef.rst?rev=321112&r1=321111&r2=321112&view=diff
==============================================================================
--- llvm/trunk/docs/MIRLangRef.rst (original)
+++ llvm/trunk/docs/MIRLangRef.rst Tue Dec 19 13:47:10 2017
@@ -724,6 +724,18 @@ The syntax for the ``returnaddress`` int
%x0 = COPY intrinsic(@llvm.returnaddress)
+Predicate Operands
+^^^^^^^^^^^^^^^^^^
+
+A Predicate operand contains an IR predicate from ``CmpInst::Predicate``, like
+``ICMP_EQ``, etc.
+
+For an int eq predicate ``ICMP_EQ``, the syntax is:
+
+.. code-block:: text
+
+ %2:gpr(s32) = G_ICMP intpred(eq), %0, %1
+
.. TODO: Describe the parsers default behaviour when optional YAML attributes
are missing.
.. TODO: Describe the syntax for the bundled instructions.
Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=321112&r1=321111&r2=321112&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Tue Dec 19 13:47:10 2017
@@ -785,7 +785,8 @@ void MIPrinter::print(const MachineInstr
case MachineOperand::MO_Metadata:
case MachineOperand::MO_MCSymbol:
case MachineOperand::MO_CFIIndex:
- case MachineOperand::MO_IntrinsicID: {
+ case MachineOperand::MO_IntrinsicID:
+ case MachineOperand::MO_Predicate: {
unsigned TiedOperandIdx = 0;
if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
@@ -814,12 +815,6 @@ void MIPrinter::print(const MachineInstr
printCustomRegMask(Op.getRegMask(), OS, TRI);
break;
}
- case MachineOperand::MO_Predicate: {
- auto Pred = static_cast<CmpInst::Predicate>(Op.getPredicate());
- OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred("
- << CmpInst::getPredicateName(Pred) << ')';
- break;
- }
}
}
Modified: llvm/trunk/lib/CodeGen/MachineOperand.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineOperand.cpp?rev=321112&r1=321111&r2=321112&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineOperand.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineOperand.cpp Tue Dec 19 13:47:10 2017
@@ -807,8 +807,8 @@ void MachineOperand::print(raw_ostream &
}
case MachineOperand::MO_Predicate: {
auto Pred = static_cast<CmpInst::Predicate>(getPredicate());
- OS << '<' << (CmpInst::isIntPredicate(Pred) ? "intpred" : "floatpred")
- << CmpInst::getPredicateName(Pred) << '>';
+ OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred("
+ << CmpInst::getPredicateName(Pred) << ')';
break;
}
}
Modified: llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp?rev=321112&r1=321111&r2=321112&view=diff
==============================================================================
--- llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp (original)
+++ llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp Tue Dec 19 13:47:10 2017
@@ -10,6 +10,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/IR/Constants.h"
+#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
@@ -382,4 +383,20 @@ TEST(MachineOperandTest, PrintIntrinsicI
}
}
+TEST(MachineOperandTest, PrintPredicate) {
+ // Create a MachineOperand with a generic intrinsic ID.
+ MachineOperand MO = MachineOperand::CreatePredicate(CmpInst::ICMP_EQ);
+
+ // Checking some preconditions on the newly created
+ // MachineOperand.
+ ASSERT_TRUE(MO.isPredicate());
+ ASSERT_TRUE(MO.getPredicate() == CmpInst::ICMP_EQ);
+
+ std::string str;
+ // Print a MachineOperand containing a int predicate ICMP_EQ.
+ raw_string_ostream OS(str);
+ MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr);
+ ASSERT_TRUE(OS.str() == "intpred(eq)");
+}
+
} // end namespace
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