[PATCH] D41369: [PowerPC] Fix for PR35688 - handle out-of-range values for r+r to r+i conversion

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


================
Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:2912
+  if (III.TruncateImmTo)
+    Imm &= ((1 << III.TruncateImmTo) - 1);
   if (III.SignedImm) {
----------------
bkramer wrote:
> Is this correct? This would turn
> 
>   li c, 65
>   srad x, x, c
> into
>   sradi x, x, 1
> 
> My PPC asm is a bit rusty, but those two things don't look
> like they do the same thing.
The two would indeed have different semantics. The former would replicate the sign bit in every bit in register `x`.  The latter would shift right by 1 bit and replicate the sign bit in the vacated high-order bit.

However, the patch will not do that transformation. Please note that for algebraic right shifts, we `III.TruncateImmTo = 0;` which will ensure we just bail on the transformation if the immediate is wider than 6 bits (5 bits for `sraw` and friends).


Repository:
  rL LLVM

https://reviews.llvm.org/D41369