[llvm] r321006 - Fix inconsistent line endings in ARCDisassembler.cpp. NFC.

[Dimitry Andric via llvm-commits]

Author: dim
Date: Mon Dec 18 10:45:37 2017
New Revision: 321006

URL: http://llvm.org/viewvc/llvm-project?rev=321006&view=rev
Log:
Fix inconsistent line endings in ARCDisassembler.cpp. NFC.

Modified:
    llvm/trunk/lib/Target/ARC/Disassembler/ARCDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARC/Disassembler/ARCDisassembler.cpp?rev=321006&r1=321005&r2=321006&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARC/Disassembler/ARCDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARC/Disassembler/ARCDisassembler.cpp Mon Dec 18 10:45:37 2017
@@ -273,9 +273,9 @@ static DecodeStatus DecodeMoveHRegInstru
                                               const void *Decoder) {
   DEBUG(dbgs() << "Decoding MOV_S h-register\n");
   using Field = decltype(Insn);
-  Field h = fieldFromInstruction(Insn, 5, 3) |
-            (fieldFromInstruction(Insn, 0, 2) << 3);
-  Field g = fieldFromInstruction(Insn, 8, 3) |
+  Field h = fieldFromInstruction(Insn, 5, 3) |
+            (fieldFromInstruction(Insn, 0, 2) << 3);
+  Field g = fieldFromInstruction(Insn, 8, 3) |
             (fieldFromInstruction(Insn, 3, 2) << 3);
 
   auto DecodeRegisterOrImm = [&Inst, Address, Decoder](Field RegNum,