[PATCH] D40886: [LVI] Support for ashr in LVI
Max Kazantsev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 18 06:24:15 PST 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL320983: [LVI] Support for ashr in LVI (authored by mkazantsev, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D40886?vs=127337&id=127347#toc
Repository:
rL LLVM
https://reviews.llvm.org/D40886
Files:
llvm/trunk/lib/Analysis/LazyValueInfo.cpp
llvm/trunk/test/Analysis/LazyValueAnalysis/lvi-for-ashr.ll
Index: llvm/trunk/lib/Analysis/LazyValueInfo.cpp
===================================================================
--- llvm/trunk/lib/Analysis/LazyValueInfo.cpp
+++ llvm/trunk/lib/Analysis/LazyValueInfo.cpp
@@ -1002,6 +1002,7 @@
case Instruction::UDiv:
case Instruction::Shl:
case Instruction::LShr:
+ case Instruction::AShr:
case Instruction::And:
case Instruction::Or:
// continue into the code below
Index: llvm/trunk/test/Analysis/LazyValueAnalysis/lvi-for-ashr.ll
===================================================================
--- llvm/trunk/test/Analysis/LazyValueAnalysis/lvi-for-ashr.ll
+++ llvm/trunk/test/Analysis/LazyValueAnalysis/lvi-for-ashr.ll
@@ -0,0 +1,27 @@
+; RUN: opt -correlated-propagation -S %s | FileCheck %s
+; CHECK-LABEL: @test-ashr
+; CHECK: bb_then
+; CHECK: %. = select i1 true, i32 3, i32 2
+define i32 @test-ashr(i32 %c) {
+chk65:
+ %cmp = icmp sgt i32 %c, 65
+ br i1 %cmp, label %return, label %chk0
+
+chk0:
+ %cmp1 = icmp slt i32 %c, 0
+ br i1 %cmp, label %return, label %bb_if
+
+bb_if:
+ %ashr.val = ashr exact i32 %c, 2
+ %cmp2 = icmp sgt i32 %ashr.val, 15
+ br i1 %cmp2, label %bb_then, label %return
+
+bb_then:
+ %cmp3 = icmp eq i32 %ashr.val, 16
+ %. = select i1 %cmp3, i32 3, i32 2
+ br label %return
+
+return:
+ %retval = phi i32 [0, %chk65], [1, %chk0], [%., %bb_then], [4, %bb_if]
+ ret i32 %retval
+}
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