[llvm] r320932 - [X86][AVX] Use extract128BitVector helper. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 16 15:09:57 PST 2017


Author: rksimon
Date: Sat Dec 16 15:09:57 2017
New Revision: 320932

URL: http://llvm.org/viewvc/llvm-project?rev=320932&view=rev
Log:
[X86][AVX] Use extract128BitVector helper. NFCI.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=320932&r1=320931&r2=320932&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Dec 16 15:09:57 2017
@@ -10450,10 +10450,7 @@ static SDValue lowerVectorShuffleAsBroad
            "Unexpected vector element size");
     assert((SrcVT.is256BitVector() || SrcVT.is512BitVector()) &&
            "Unexpected vector size");
-
-    MVT ExtVT = MVT::getVectorVT(SrcVT.getScalarType(), 128 / EltSize);
-    V = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ExtVT, V,
-                    DAG.getIntPtrConstant(BroadcastIdx, DL));
+    V = extract128BitVector(V, BroadcastIdx, DAG, DL);
   }
 
   if (Opcode == X86ISD::MOVDDUP && !V.getValueType().isVector())




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