[PATCH] D41285: [mips] Remove codegen support from some 16 bit instructions

[Simon Dardis via Phabricator via llvm-commits]

sdardis created this revision.
sdardis added a reviewer: atanasyan.
Herald added a subscriber: arichardson.

These instructions conflict with their full length variants
for the purposes of FastISel as they cannot be distingushed
based on the number and type of operands and predicates.


Repository:
  rL LLVM

https://reviews.llvm.org/D41285

Files:
  lib/Target/Mips/MicroMips32r6InstrInfo.td
  test/CodeGen/Mips/llvm-ir/and.ll
  test/CodeGen/Mips/llvm-ir/ashr.ll
  test/CodeGen/Mips/llvm-ir/lshr.ll
  test/CodeGen/Mips/llvm-ir/or.ll
  test/CodeGen/Mips/llvm-ir/shl.ll
  test/CodeGen/Mips/llvm-ir/xor.ll

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